[PATCH] D100855: AArch64: support mixed-size vector fp <-> int conversions in GlobalISel.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir:644-646
+registers:
+  - { id: 0, class: fpr }
+  - { id: 1, class: fpr }
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Should drop the registers section and use the modern ":regbank" syntax


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100855/new/

https://reviews.llvm.org/D100855