[PATCH] D100856: [RISCV] Support STEP_VECTOR with a step greater than one

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck created this revision.
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DAGCombiner was recently taught how to combine STEP_VECTOR nodes,
meaning the step value is no longer guaranteed to be one by the time it
reaches the backend for lowering.

This patch supports such cases on RISC-V by lowering to other step
values to a multiply following the vid.v instruction. It includes a
small optimization for common cases where the multiply can be expressed
as a shift left.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100856

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/stepvector.ll

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