[PATCH] D100770: [AMDGPU] Allow multiple uses of the same literal

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 20 06:56:34 PDT 2021


foad marked an inline comment as done.
foad added a comment.

In D100770#2698974 <https://reviews.llvm.org/D100770#2698974>, @rampitec wrote:

> I wonder if a 16 bit literal + non-default opsel and the same literal with different opsel, or different literal which turns into the same literal after opsel is applied constitutes a same value? I.e. is it checked on decoding or after?

AMDGPUAsmParser::validateConstantBusLimitations says that if different operands use the same literal with different sizes, then that counts as two scalar values. So I guess we may need to refine this code a bit, but I would prefer to leave that for later patches.



================
Comment at: llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir:14
+    ; CHECK: $vgpr0 = V_CNDMASK_B32_e64 0, 1234567, 0, 1234567, killed $vcc_lo, implicit $exec
+    $vgpr0 = V_CNDMASK_B32_e64 0, 1234567, 0, 1234567, killed $vcc_lo, implicit $exec
+...
----------------
arsenm wrote:
> Should probably add a few more tests for other instruction types (in particular ones without an implicit vcc use and would be a more sensible place for this to happen)
Added an fma test which is slightly more realistic.


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