[PATCH] D100574: [RISCV] Fix missing emergency slots for scalable stack offsets

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck marked an inline comment as done.
frasercrmck added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:863
+    // For RVV, scalable stack offsets require up to two scratch registers to
+    // compute the final offset. Reserve an additional emergency spill slot.
+    if (RVVStackSize != 0) {
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HsiangKai wrote:
> frasercrmck wrote:
> > frasercrmck wrote:
> > > HsiangKai wrote:
> > > > What if `!isInt<11>(MFI.estimateStackSize(MF))` and `RVVStackSize != 0` occurred in the same function, do we need three or two emergency spill slot in total?
> > > I had assumed the worst case would still be two, but I'll run some tests.
> > In my simple testing, when both are true it's still two slots. I don't know if there's a more targeted test we can use for that (e.g. if fp vs sp would change things)
> I think it is fine with this patch.
I have actually just found this case, just a bit too late. I think it's possible to optimize it so that it still requires only two registers. I'll post up a follow-up patch shortly.


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  https://reviews.llvm.org/D100574/new/

https://reviews.llvm.org/D100574