[llvm] 6a4d9cb - [AMDGPU] Remove error check for indirect calls and add missing queue-ptr
via llvm-commits
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Mon Apr 19 12:05:33 PDT 2021
Author: madhur13490
Date: 2021-04-20T00:35:17+05:30
New Revision: 6a4d9cb7e04d50d45819848ed8dc19c03242b8ca
URL: https://github.com/llvm/llvm-project/commit/6a4d9cb7e04d50d45819848ed8dc19c03242b8ca
DIFF: https://github.com/llvm/llvm-project/commit/6a4d9cb7e04d50d45819848ed8dc19c03242b8ca.diff
LOG: [AMDGPU] Remove error check for indirect calls and add missing queue-ptr
This patch removes -fixed-abi check for indirect calls
and also adds queue-ptr which is required for indirect calls to work.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D100633
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
llvm/test/CodeGen/AMDGPU/call-constant.ll
llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
index d9a26ec77b3a..c986b261e36a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
@@ -31,7 +31,7 @@ static constexpr StringLiteral ImplicitAttrNames[] = {
"amdgpu-work-item-id-z", "amdgpu-work-group-id-x",
"amdgpu-work-group-id-y", "amdgpu-work-group-id-z",
"amdgpu-dispatch-ptr", "amdgpu-dispatch-id",
- "amdgpu-implicitarg-ptr"};
+ "amdgpu-queue-ptr", "amdgpu-implicitarg-ptr"};
class AMDGPUAnnotateKernelFeatures : public CallGraphSCCPass {
private:
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 726bc87d5a16..785f2191dc9e 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2958,12 +2958,6 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
if (!CLI.CB)
report_fatal_error("unsupported libcall legalization");
- if (!AMDGPUTargetMachine::EnableFixedFunctionABI &&
- !CLI.CB->getCalledFunction() && CallConv != CallingConv::AMDGPU_Gfx) {
- return lowerUnhandledCall(CLI, InVals,
- "unsupported indirect call to function ");
- }
-
if (IsTailCall && MF.getTarget().Options.GuaranteedTailCallOpt) {
return lowerUnhandledCall(CLI, InVals,
"unsupported required tail call to function ");
diff --git a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
index 6570f2046f35..65644af6780e 100644
--- a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
@@ -334,4 +334,4 @@ attributes #3 = { nounwind }
; HSA: attributes #17 = { nounwind "uniform-work-group-size"="false" }
; HSA: attributes #18 = { nounwind }
; HSA: attributes #19 = { nounwind "amdgpu-calls" "uniform-work-group-size"="false" }
-; HSA: attributes #20 = { nounwind "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" "target-cpu"="fiji" }
+; HSA: attributes #20 = { nounwind "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-queue-ptr" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" "target-cpu"="fiji" }
diff --git a/llvm/test/CodeGen/AMDGPU/call-constant.ll b/llvm/test/CodeGen/AMDGPU/call-constant.ll
index d9376decac9c..a02f4f31851e 100644
--- a/llvm/test/CodeGen/AMDGPU/call-constant.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-constant.ll
@@ -4,8 +4,8 @@
; FIXME: Emitting unnecessary flat_scratch setup
; GCN-LABEL: {{^}}test_call_undef:
-; SDAG: s_mov_b32 flat_scratch_lo, s11
-; SDAG: s_add_u32 s10, s10, s15
+; SDAG: s_mov_b32 flat_scratch_lo, s13
+; SDAG: s_add_u32 s12, s12, s17
; SDAG: s_lshr_b32
; GCN: s_endpgm
define amdgpu_kernel void @test_call_undef() #0 {
@@ -26,8 +26,8 @@ define i32 @test_tail_call_undef() #0 {
}
; GCN-LABEL: {{^}}test_call_null:
-; SDAG: s_mov_b32 flat_scratch_lo, s11
-; SDAG: s_add_u32 s10, s10, s15
+; SDAG: s_mov_b32 flat_scratch_lo, s13
+; SDAG: s_add_u32 s12, s12, s17
; SDAG: s_lshr_b32
; GISEL: s_swappc_b64 s{{\[[0-9]+:[0-9]+\]}}, 0{{$}}
diff --git a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
index 20354cf24115..e5599c69d73e 100644
--- a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
@@ -1,15 +1,48 @@
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-annotate-kernel-features %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
+
+target datalayout = "A5"
+
; GCN-LABEL: define internal void @indirect() #0 {
+; GFX9-LABEL: {{^}}indirect:
define internal void @indirect() {
ret void
}
; GCN-LABEL: define amdgpu_kernel void @test_simple_indirect_call() #1 {
+; GFX9-LABEL: {{^}}test_simple_indirect_call:
+; GFX9: s_add_u32 flat_scratch_lo, s12, s17
+; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s13, 0
+; GFX9-NEXT: s_mov_b32 s13, s15
+; GFX9-NEXT: s_mov_b32 s12, s14
+; GFX9-NEXT: s_load_dwordx2 s[14:15], s[4:5], 0x4
+; GFX9-NEXT: s_add_u32 s0, s0, s17
+; GFX9-NEXT: s_addc_u32 s1, s1, 0
+; GFX9-NEXT: s_mov_b32 s32, 0
+; GFX9-NEXT: s_waitcnt lgkmcnt(0)
+; GFX9-NEXT: s_lshr_b32 s14, s14, 16
+; GFX9-NEXT: s_mul_i32 s14, s14, s15
+; GFX9-NEXT: v_mul_lo_u32 v3, s14, v0
+; GFX9-NEXT: s_getpc_b64 s[18:19]
+; GFX9-NEXT: s_add_u32 s18, s18, indirect at rel32@lo+4
+; GFX9-NEXT: s_addc_u32 s19, s19, indirect at rel32@hi+12
+; GFX9-NEXT: s_mov_b32 s14, s16
+; GFX9-NEXT: v_mad_u32_u24 v3, v1, s15, v3
+; GFX9-NEXT: v_add_lshl_u32 v5, v3, v2, 3
+; GFX9-NEXT: v_mov_b32_e32 v3, s18
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 20, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 10, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s19
+; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2
+; GFX9-NEXT: ds_write_b64 v5, v[3:4]
+; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
+; GFX9-NEXT: s_endpgm
define amdgpu_kernel void @test_simple_indirect_call() {
- %fptr = alloca void()*
- store void()* @indirect, void()** %fptr
- %fp = load void()*, void()** %fptr
+ %fptr = alloca void()*, addrspace(5)
+ %fptr.cast = addrspacecast void()* addrspace(5)* %fptr to void()**
+ store void()* @indirect, void()** %fptr.cast
+ %fp = load void()*, void()** %fptr.cast
call void %fp()
ret void
}
diff --git a/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll b/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
index 62a2c1348c41..a50dccc757be 100644
--- a/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
+++ b/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
@@ -62,13 +62,6 @@ define i32 @test_tail_call_bitcast_extern_variadic(<4 x float> %arg0, <4 x float
ret i32 %call
}
-; GCN: :0:0: in function test_indirect_call void (void ()*): unsupported indirect call to function <unknown>
-; R600: in function test_indirect_call{{.*}}: unsupported call to function <unknown>
-define void @test_indirect_call(void()* %fptr) {
- call void %fptr()
- ret void
-}
-
; GCN: :0:0: in function test_c_call_from_shader i32 (): unsupported calling convention for call from graphics shader of function defined_function
; R600: in function test_c_call{{.*}}: unsupported call to function defined_function
define amdgpu_ps i32 @test_c_call_from_shader() {
@@ -83,12 +76,3 @@ define amdgpu_ps i32 @test_gfx_call_from_shader() {
ret i32 %call
}
-; FIXME: Bad error message
-; GCN: error: <unknown>:0:0: in function test_call_absolute void (): unsupported indirect call to function <unknown>
-; R600: error: <unknown>:0:0: in function test_call_absolute void (): unsupported call to function <unknown>
-define amdgpu_kernel void @test_call_absolute() #0 {
- %val = call i32 inttoptr (i64 1234 to i32(i32)*) (i32 1)
- %op = add i32 %val, 1
- store volatile i32 %op, i32 addrspace(1)* undef
- ret void
-}
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