[PATCH] D100300: [AMDGPU] Refactor ds_read/ds_write related select code for better readability.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 19 02:34:10 PDT 2021
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:843-847
+foreach vt = VReg_64.RegTypes in {
+defm : DSReadPat_mc <DS_READ_B64, vt, "load_align8_local">;
+}
+
foreach vt = VReg_64.RegTypes in {
----------------
Please just merge these two foreach loops. Same for the other pairs of foreach loops which are now adjacent.
================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:880
+// For performance reasons, *do not* select ds_read_b128/ds_write_b128 in
+// unaligned-access-mode. At lower alignments ds_read2_b64/ds_write2_b64 is
----------------
I think something like "do not select ds_read_b128/ds_write_b128 for unaligned accesses" would be more accurate. We still select them for aligned accesses.
Also "at lower alignments" doesn't make much sense now you have changed the first half of the comment not to mention any particular alignment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100300/new/
https://reviews.llvm.org/D100300
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