[PATCH] D100721: [SCEVExpander] Try to create ASHR instr for expanded SCEV expr.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: lebedev.ri, nikic, reames, mkazantsev.
Herald added subscribers: javed.absar, hiraditya.
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ec54867df5e7 <https://reviews.llvm.org/rGec54867df5e7f20e12146e628af34f0384308bcb> updated SCEV to epxand ASHR instructions to an
equivalent SCEV expression. This has the side effect that expanding
expressions based on ASHR instructions now expand to substantially
larger IR than before, which means the IndVarSimplify for example can
add a substantial amount of extra instructions when re-writing exit
conditions. This is causing ~5% regressions in some Geekbench
benchmarks.

This patch tries to match the SCEV expression created for ASHR during
expansion and emit an ASHR instruction directly. Note that currently
this pattern is not completely correct, because we have no way of
differentiating exact and non-exact UDivs in SCEV (see
the no_ashr_due_to_missing_exact_udiv test case, which generates ashr
incorrectly)! This needs to be resolved first and I'd appreciate any
feedback on the preferred direction.

Should we just add a flag to SCEVUDivExpr? Or mark UDivs as exact in a
separate table?

Note that there are other places using SCEVExpander where this likely
pessimizes the generated IR, e.g. when generating runtime checks for LV.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100721

Files:
  llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
  llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll

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