[PATCH] D100709: X86/GlobalISel: Rely on default assignValueToRe

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: aemerson, paquette, qcolombet, bogner, igorb, dsanders, craig.topper.
Herald added subscribers: pengfei, hiraditya, rovka.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

The resulting output is semantically closer to what the DAG emits and
is more compatible with the existing CCAssignFns.


https://reviews.llvm.org/D100709

Files:
  llvm/lib/Target/X86/X86CallLowering.cpp
  llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll


Index: llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
===================================================================
--- llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
+++ llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
@@ -225,11 +225,9 @@
   ; X64-LABEL: name: test_float_args
   ; X64: bb.1 (%ir-block.0):
   ; X64:   liveins: $xmm0, $xmm1
-  ; X64:   [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
-  ; X64:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
-  ; X64:   [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
-  ; X64:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
-  ; X64:   [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[TRUNC1]](s32)
+  ; X64:   [[COPY:%[0-9]+]]:_(s32) = COPY $xmm0
+  ; X64:   [[COPY1:%[0-9]+]]:_(s32) = COPY $xmm1
+  ; X64:   [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[COPY1]](s32)
   ; X64:   $xmm0 = COPY [[ANYEXT]](s128)
   ; X64:   RET 0, implicit $xmm0
   ret float %arg2
@@ -248,11 +246,9 @@
   ; X64-LABEL: name: test_double_args
   ; X64: bb.1 (%ir-block.0):
   ; X64:   liveins: $xmm0, $xmm1
-  ; X64:   [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
-  ; X64:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
-  ; X64:   [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
-  ; X64:   [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
-  ; X64:   [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[TRUNC1]](s64)
+  ; X64:   [[COPY:%[0-9]+]]:_(s64) = COPY $xmm0
+  ; X64:   [[COPY1:%[0-9]+]]:_(s64) = COPY $xmm1
+  ; X64:   [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[COPY1]](s64)
   ; X64:   $xmm0 = COPY [[ANYEXT]](s128)
   ; X64:   RET 0, implicit $xmm0
   ret double %arg2
Index: llvm/lib/Target/X86/X86CallLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86CallLowering.cpp
+++ llvm/lib/Target/X86/X86CallLowering.cpp
@@ -264,36 +264,7 @@
   void assignValueToReg(Register ValVReg, Register PhysReg,
                         CCValAssign &VA) override {
     markPhysRegUsed(PhysReg);
-
-    switch (VA.getLocInfo()) {
-    default: {
-      // If we are copying the value from a physical register with the
-      // size larger than the size of the value itself - build the copy
-      // of the phys reg first and then build the truncation of that copy.
-      // The example of that would be copying from xmm0 to s32, for which
-      // case ValVT == LocVT == MVT::f32. If LocSize and ValSize are not equal
-      // we expect this to be handled in SExt/ZExt/AExt case.
-      unsigned PhysRegSize =
-          MRI.getTargetRegisterInfo()->getRegSizeInBits(PhysReg, MRI);
-      unsigned ValSize = VA.getValVT().getSizeInBits();
-      unsigned LocSize = VA.getLocVT().getSizeInBits();
-      if (PhysRegSize > ValSize && LocSize == ValSize) {
-        auto Copy = MIRBuilder.buildCopy(LLT::scalar(PhysRegSize), PhysReg);
-        MIRBuilder.buildTrunc(ValVReg, Copy);
-        return;
-      }
-
-      MIRBuilder.buildCopy(ValVReg, PhysReg);
-      break;
-    }
-    case CCValAssign::LocInfo::SExt:
-    case CCValAssign::LocInfo::ZExt:
-    case CCValAssign::LocInfo::AExt: {
-      auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg);
-      MIRBuilder.buildTrunc(ValVReg, Copy);
-      break;
-    }
-    }
+    IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
   }
 
   /// How the physical register gets marked varies between formal


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