[llvm] a0ed70a - [AMDGPU] Remove redundant field from DPP8 def

[Joe Nash via llvm-commits]

Author: Joe Nash
Date: 2021-04-16T16:23:52-04:00
New Revision: a0ed70abded169a6e3d5a304aa2e120f3a78fd76

URL: https://github.com/llvm/llvm-project/commit/a0ed70abded169a6e3d5a304aa2e120f3a78fd76
DIFF: https://github.com/llvm/llvm-project/commit/a0ed70abded169a6e3d5a304aa2e120f3a78fd76.diff

LOG: [AMDGPU] Remove redundant field from DPP8 def

These lines set the value to what it already was,
so they are redundant. NFC

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D100664

Change-Id: Ibf6f27d50a7fa1f76c127f01b799821378bfd3b3

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOP1Instructions.td
    llvm/lib/Target/AMDGPU/VOP2Instructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
index c2bbdd9ee881..6bf9b98dc68f 100644
--- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -525,9 +525,6 @@ class VOP1_DPP8<bits<8> op, VOP1_Pseudo ps, VOPProfile p = ps.Pfl> :
   let Inst{16-9}  = op;
   let Inst{24-17} = !if(p.EmitDst, vdst{7-0}, 0);
   let Inst{31-25} = 0x3f;
-
-  let AssemblerPredicate = HasDPP8;
-  let SubtargetPredicate = HasDPP8;
 }
 
 //===----------------------------------------------------------------------===//

diff  --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index 76da6dc92f47..2fa3bb15bbe8 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -931,8 +931,6 @@ class VOP2_DPP8<bits<6> op, VOP2_Pseudo ps,
   let Inst{30-25} = op;
   let Inst{31}    = 0x0;
 
-  let AssemblerPredicate = HasDPP8;
-  let SubtargetPredicate = HasDPP8;
   let OtherPredicates = ps.OtherPredicates;
 }