[llvm] 9761852 - [AMDGPU] Remove dead dcode (NFC).
Christudasan Devadasan via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 16 10:47:52 PDT 2021
Author: Christudasan Devadasan
Date: 2021-04-16T23:03:31+05:30
New Revision: 97618522dc66d7b06bd41c961fcafa09f537713b
URL: https://github.com/llvm/llvm-project/commit/97618522dc66d7b06bd41c961fcafa09f537713b
DIFF: https://github.com/llvm/llvm-project/commit/97618522dc66d7b06bd41c961fcafa09f537713b.diff
LOG: [AMDGPU] Remove dead dcode (NFC).
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index d86f277bf3e2..e617fbe16841 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2831,18 +2831,6 @@ void AMDGPULegalizerInfo::legalizeUDIV_UREM32Impl(MachineIRBuilder &B,
B.buildSelect(DstReg, Cond, B.buildSub(S32, R, Y), R);
}
-bool AMDGPULegalizerInfo::legalizeUDIV_UREM32(MachineInstr &MI,
- MachineRegisterInfo &MRI,
- MachineIRBuilder &B) const {
- const bool IsDiv = MI.getOpcode() == AMDGPU::G_UDIV;
- Register DstReg = MI.getOperand(0).getReg();
- Register Num = MI.getOperand(1).getReg();
- Register Den = MI.getOperand(2).getReg();
- legalizeUDIV_UREM32Impl(B, DstReg, Num, Den, IsDiv);
- MI.eraseFromParent();
- return true;
-}
-
// Build integer reciprocal sequence arounud V_RCP_IFLAG_F32
//
// Return lo, hi of result
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
index de603e2d9cec..7aa5f6214ec6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
@@ -105,10 +105,6 @@ class AMDGPULegalizerInfo final : public LegalizerInfo {
void legalizeUDIV_UREM32Impl(MachineIRBuilder &B,
Register DstReg, Register Num, Register Den,
bool IsRem) const;
- bool legalizeUDIV_UREM32(MachineInstr &MI, MachineRegisterInfo &MRI,
- MachineIRBuilder &B) const;
- bool legalizeSDIV_SREM32(MachineInstr &MI, MachineRegisterInfo &MRI,
- MachineIRBuilder &B) const;
void legalizeUDIV_UREM64Impl(MachineIRBuilder &B,
Register DstReg, Register Numer, Register Denom,
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