[PATCH] D99272: [AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.
Stelios Ioannou via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 16 08:55:12 PDT 2021
stelios-arm updated this revision to Diff 338139.
stelios-arm added a comment.
1. Added more test cases.
2. Addressed the remarks.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D99272/new/
https://reviews.llvm.org/D99272
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.h
llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
llvm/test/CodeGen/AArch64/strpre-str-merge.mir
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