[PATCH] D87479: [InstCombine] Don't sink the fdiv from (fmul (fdiv 1.0, %x), %y) if the fdiv isn't in the same basic block as the fmul

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In D87479#2694818 <https://reviews.llvm.org/D87479#2694818>, @spatel wrote:

> https://godbolt.org/z/4vss8qrTG

The x86 asm also shows an interesting trade-off: SDAG could form a reciprocal estimate when the fdiv was sunk back into the loop...but it couldn't hoist the refinement math, so that's likely worse perf.


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