[llvm] b7ebb25 - [AMDGPU] Factor out SelectSAddrFI()

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2021-04-14T09:40:02-07:00
New Revision: b7ebb25e53538002d6bccec58cc9ca8e80c042fe

URL: https://github.com/llvm/llvm-project/commit/b7ebb25e53538002d6bccec58cc9ca8e80c042fe
DIFF: https://github.com/llvm/llvm-project/commit/b7ebb25e53538002d6bccec58cc9ca8e80c042fe.diff

LOG: [AMDGPU] Factor out SelectSAddrFI()

This is a service function generally useful for selection
of a FI in an SADDR. NFC for now, needed for future patch.

Differential Revision: https://reviews.llvm.org/D100406

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 8ac13478fdfc..569d0addaabd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -1858,6 +1858,24 @@ bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N,
   return true;
 }
 
+static SDValue SelectSAddrFI(SelectionDAG *CurDAG, SDValue SAddr) {
+  if (auto FI = dyn_cast<FrameIndexSDNode>(SAddr)) {
+    SAddr = CurDAG->getTargetFrameIndex(FI->getIndex(), FI->getValueType(0));
+  } else if (SAddr.getOpcode() == ISD::ADD &&
+             isa<FrameIndexSDNode>(SAddr.getOperand(0))) {
+    // Materialize this into a scalar move for scalar address to avoid
+    // readfirstlane.
+    auto FI = cast<FrameIndexSDNode>(SAddr.getOperand(0));
+    SDValue TFI = CurDAG->getTargetFrameIndex(FI->getIndex(),
+                                              FI->getValueType(0));
+    SAddr = SDValue(CurDAG->getMachineNode(AMDGPU::S_ADD_U32, SDLoc(SAddr),
+                                           MVT::i32, TFI, SAddr.getOperand(1)),
+                    0);
+  }
+
+  return SAddr;
+}
+
 // Match (32-bit SGPR base) + sext(imm offset)
 bool AMDGPUDAGToDAGISel::SelectScratchSAddr(SDNode *N,
                                             SDValue Addr,
@@ -1874,19 +1892,7 @@ bool AMDGPUDAGToDAGISel::SelectScratchSAddr(SDNode *N,
     SAddr = Addr.getOperand(0);
   }
 
-  if (auto FI = dyn_cast<FrameIndexSDNode>(SAddr)) {
-    SAddr = CurDAG->getTargetFrameIndex(FI->getIndex(), FI->getValueType(0));
-  } else if (SAddr.getOpcode() == ISD::ADD &&
-             isa<FrameIndexSDNode>(SAddr.getOperand(0))) {
-    // Materialize this into a scalar move for scalar address to avoid
-    // readfirstlane.
-    auto FI = cast<FrameIndexSDNode>(SAddr.getOperand(0));
-    SDValue TFI = CurDAG->getTargetFrameIndex(FI->getIndex(),
-                                              FI->getValueType(0));
-    SAddr = SDValue(CurDAG->getMachineNode(AMDGPU::S_ADD_U32, SDLoc(SAddr),
-                                           MVT::i32, TFI, SAddr.getOperand(1)),
-                    0);
-  }
+  SAddr = SelectSAddrFI(CurDAG, SAddr);
 
   const SIInstrInfo *TII = Subtarget->getInstrInfo();