[llvm] c4c9e4d - [X86] Add PR49028 test case
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 14 07:55:29 PDT 2021
Author: Simon Pilgrim
Date: 2021-04-14T15:55:21+01:00
New Revision: c4c9e4d6df3c492cf86728288b14a9bc718f6e2d
URL: https://github.com/llvm/llvm-project/commit/c4c9e4d6df3c492cf86728288b14a9bc718f6e2d
DIFF: https://github.com/llvm/llvm-project/commit/c4c9e4d6df3c492cf86728288b14a9bc718f6e2d.diff
LOG: [X86] Add PR49028 test case
Added:
llvm/test/CodeGen/X86/pr49028.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/pr49028.ll b/llvm/test/CodeGen/X86/pr49028.ll
new file mode 100644
index 000000000000..9b673902d7bd
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr49028.ll
@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+
+define zeroext i16 @PR49028(i16 zeroext %0, i8* %1) {
+; X86-LABEL: PR49028:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: testw %ax, %ax
+; X86-NEXT: sete (%ecx)
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: PR49028:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: shrl %eax
+; X64-NEXT: testw %ax, %ax
+; X64-NEXT: sete (%rsi)
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %3 = lshr i16 %0, 1
+ %4 = icmp eq i16 %3, 0
+ %5 = zext i1 %4 to i8
+ store i8 %5, i8* %1, align 1
+ ret i16 %3
+}
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