[PATCH] D100453: [MIR][NFC] Introduce a new method to check a MachineInstr contains implicit register

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

This is also further confused by the two types of implicit operands. There are implicit physical register uses as present in the instruction definition, but also implicit uses that code can arbitrarily append to an instruction



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Comment at: llvm/include/llvm/CodeGen/MachineInstr.h:1864
+  bool containsImplicitRegister() const {
+    return any_of(operands(), [](const MachineOperand &MO) {
+      return MO.isReg() && MO.isImplicit();
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This would early out earlier if you check from the back too


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  https://reviews.llvm.org/D100453/new/

https://reviews.llvm.org/D100453