[PATCH] D100430: [AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads
Vang Thao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 13 18:01:56 PDT 2021
vangthao created this revision.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, jvesely, kzhuravl, arsenm.
vangthao requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
Widen 1 and 2 byte scalar loads to 4 bytes when sufficiently
aligned to avoid using a global load.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D100430
Files:
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D100430.337299.patch
Type: text/x-patch
Size: 11932 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210414/ea4d1494/attachment.bin>
More information about the llvm-commits
mailing list