[PATCH] D100124: [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX redux.sync instructions

[Steffen Larsen via Phabricator via llvm-commits]

steffenlarsen added a comment.

In D100124#2684303 <https://reviews.llvm.org/D100124#2684303>, @JonChesterfield wrote:

> Interesting. Reduction across lanes in warp? If so, this is probably a way to handle the last step reduction for openmp reductions

It is! I can imagine that it would be useful for OpenMP reductions, though it is limited to few, albeit common, operators on 32-bit integers.


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https://reviews.llvm.org/D100124