[PATCH] D98976: [CodeGen] Use ProcResGroup information in SchedBoundary

[David Penry via Phabricator via llvm-commits]

dpenry added a comment.

In D98976#2682694 <https://reviews.llvm.org/D98976#2682694>, @RKSimon wrote:

> I'm not sure this avoids the criticisms from D94604 <https://reviews.llvm.org/D94604> - we have resource groups and the child resource units, and we can control the width of both of these to model usage each cycle.
>
> But for starters, I'd like to see tests of some kind (llvm-mca timeline or whatever you prefer) that clearly shows the issue you think you're encountering.

The issue comes when using resource groups with BufferSize = 0 -- MachineScheduler just doesn't care about the group indicating a parallel use of resources, though from the discussion in D94604 <https://reviews.llvm.org/D94604>, it seems clear that this is what resource groups are intended to model.  It hasn't shown up as an issue before because resource groups with BufferSize = 0 haven't been used before D98977 <https://reviews.llvm.org/D98977> (which tries to use resource groups in the CortexM7 scheduling model instead of directly using multiple copies of a resource, as code comments indicate that using a resource twice for an in-order model is supposed to mean using it over multiple cycles.)

Some sort of test showing the change in scheduling outcomes is a good idea and I'll come up with something.


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  https://reviews.llvm.org/D98976/new/

https://reviews.llvm.org/D98976