[llvm] 67b3966 - [AMDGPU][MC][NFC] Removed extra spaces
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 12 03:33:34 PDT 2021
Author: Dmitry Preobrazhensky
Date: 2021-04-12T13:33:19+03:00
New Revision: 67b39661c84742142628591aec181eef1cb6c3b7
URL: https://github.com/llvm/llvm-project/commit/67b39661c84742142628591aec181eef1cb6c3b7
DIFF: https://github.com/llvm/llvm-project/commit/67b39661c84742142628591aec181eef1cb6c3b7.diff
LOG: [AMDGPU][MC][NFC] Removed extra spaces
Fixed bugs 49646, 49647.
Differential Revision: https://reviews.llvm.org/D100173
Added:
Modified:
llvm/lib/Target/AMDGPU/DSInstructions.td
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/DSInstructions.td b/llvm/lib/Target/AMDGPU/DSInstructions.td
index e32c36e9a18d0..2e20b671f2389 100644
--- a/llvm/lib/Target/AMDGPU/DSInstructions.td
+++ b/llvm/lib/Target/AMDGPU/DSInstructions.td
@@ -456,7 +456,7 @@ def DS_WRITE_ADDTID_B32 : DS_0A1D_NORET<"ds_write_addtid_b32">;
let SubtargetPredicate = isGFX90APlus in {
defm DS_ADD_F64 : DS_1A1D_NORET_mc_gfx9<"ds_add_f64", VReg_64>;
- defm DS_ADD_RTN_F64 : DS_1A1D_RET_mc_gfx9<"ds_add_rtn_f64 ", VReg_64, "ds_add_f64">;
+ defm DS_ADD_RTN_F64 : DS_1A1D_RET_mc_gfx9<"ds_add_rtn_f64", VReg_64, "ds_add_f64">;
} // End SubtargetPredicate = isGFX90APlus
defm DS_MSKOR_B32 : DS_1A2D_NORET_mc<"ds_mskor_b32">;
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index b3e127670a510..952147d3953ca 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -881,7 +881,7 @@ void AMDGPUInstPrinter::printDPPCtrl(const MCInst *MI, unsigned OpNo,
} else if ((Imm >= DppCtrl::ROW_SHARE_FIRST) &&
(Imm <= DppCtrl::ROW_SHARE_LAST)) {
if (AMDGPU::isGFX90A(STI)) {
- O << " row_newbcast:";
+ O << "row_newbcast:";
} else if (AMDGPU::isGFX10Plus(STI)) {
O << "row_share:";
} else {
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