[llvm] a9968c0 - [NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Tomas Matheson via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 12 02:55:36 PDT 2021
Author: Tomas Matheson
Date: 2021-03-30T17:31:39+01:00
New Revision: a9968c0a339ab47f5d6da1c513b2754f1e98a596
URL: https://github.com/llvm/llvm-project/commit/a9968c0a339ab47f5d6da1c513b2754f1e98a596
DIFF: https://github.com/llvm/llvm-project/commit/a9968c0a339ab47f5d6da1c513b2754f1e98a596.diff
LOG: [NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false.
This means that the behavior of needsStackRealignment does not correspond to
it's name and description; a function might need stack realignment, but if it
is not possible then this function returns false. Furthermore,
needsStackRealignment is not virtual and therefore some backends have made use
of canRealignStack to indicate whether a function needs stack realignment.
This patch attempts to clarify the situation by separating them and introducing
new names:
- shouldRealignStack - true if there is any reason the stack should be
realigned
- canRealignStack - true if we are still able to realign the stack (e.g. we
can still reserve/have reserved a frame pointer)
- hasStackRealignment = shouldRealignStack && canRealignStack (not target
customisable)
Targets can now override shouldRealignStack to indicate that stack realignment
is required.
This change will make it easier in a future change to handle the case where we
need to realign the stack but can't do so (for example when the register
allocator creates an aligned spill after the frame pointer has been
eliminated).
Differential Revision: https://reviews.llvm.org/D98716
Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
Added:
Modified:
llvm/include/llvm/CodeGen/TargetRegisterInfo.h
llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
llvm/lib/CodeGen/GCRootLowering.cpp
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/lib/CodeGen/MachineFrameInfo.cpp
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/StackMaps.cpp
llvm/lib/CodeGen/TargetRegisterInfo.cpp
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/lib/Target/ARC/ARCFrameLowering.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/lib/Target/ARM/ARMFrameLowering.cpp
llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
llvm/lib/Target/M68k/M68kFrameLowering.cpp
llvm/lib/Target/M68k/M68kISelLowering.cpp
llvm/lib/Target/M68k/M68kRegisterInfo.cpp
llvm/lib/Target/Mips/MipsFrameLowering.cpp
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
llvm/lib/Target/Sparc/SparcFrameLowering.cpp
llvm/lib/Target/VE/VEFrameLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86RegisterInfo.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
index 3191fff91b10b..9c34a0e7b6aa5 100644
--- a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
@@ -914,9 +914,12 @@ class TargetRegisterInfo : public MCRegisterInfo {
/// True if storage within the function requires the stack pointer to be
/// aligned more than the normal calling convention calls for.
- /// This cannot be overriden by the target, but canRealignStack can be
- /// overridden.
- bool needsStackRealignment(const MachineFunction &MF) const;
+ virtual bool shouldRealignStack(const MachineFunction &MF) const;
+
+ /// True if stack realignment is required and still possible.
+ bool hasStackRealignment(const MachineFunction &MF) const {
+ return shouldRealignStack(MF) && canRealignStack(MF);
+ }
/// Get the offset from the referenced frame index in the instruction,
/// if there is one.
diff --git a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
index d77864c0466a0..936ac5aa6399a 100644
--- a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
@@ -1377,7 +1377,7 @@ void CodeViewDebug::beginFunctionImpl(const MachineFunction *MF) {
CurFn->CSRSize = MFI.getCVBytesOfCalleeSavedRegisters();
CurFn->FrameSize = MFI.getStackSize();
CurFn->OffsetAdjustment = MFI.getOffsetAdjustment();
- CurFn->HasStackRealignment = TRI->needsStackRealignment(*MF);
+ CurFn->HasStackRealignment = TRI->hasStackRealignment(*MF);
// For this function S_FRAMEPROC record, figure out which codeview register
// will be the frame pointer.
diff --git a/llvm/lib/CodeGen/GCRootLowering.cpp b/llvm/lib/CodeGen/GCRootLowering.cpp
index ead34be9ea23d..c3b0cd92498af 100644
--- a/llvm/lib/CodeGen/GCRootLowering.cpp
+++ b/llvm/lib/CodeGen/GCRootLowering.cpp
@@ -317,8 +317,8 @@ bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
// size, we use UINT64_MAX to represent this.
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
- const bool DynamicFrameSize = MFI.hasVarSizedObjects() ||
- RegInfo->needsStackRealignment(MF);
+ const bool DynamicFrameSize =
+ MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF);
FI->setFrameSize(DynamicFrameSize ? UINT64_MAX : MFI.getStackSize());
// Find all safe points.
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index cf6512872b779..4b30ab1af8cb5 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1370,7 +1370,7 @@ bool CombinerHelper::optimizeMemcpy(MachineInstr &MI, Register Dst,
// Don't promote to an alignment that would require dynamic stack
// realignment.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->needsStackRealignment(MF))
+ if (!TRI->hasStackRealignment(MF))
while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
NewAlign = NewAlign / 2;
@@ -1475,7 +1475,7 @@ bool CombinerHelper::optimizeMemmove(MachineInstr &MI, Register Dst,
// Don't promote to an alignment that would require dynamic stack
// realignment.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->needsStackRealignment(MF))
+ if (!TRI->hasStackRealignment(MF))
while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
NewAlign = NewAlign / 2;
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index 7ba27ff1c8568..ca5936a147797 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -173,7 +173,7 @@ uint64_t MachineFrameInfo::estimateStackSize(const MachineFunction &MF) const {
// value.
Align StackAlign;
if (adjustsStack() || hasVarSizedObjects() ||
- (RegInfo->needsStackRealignment(MF) && getObjectIndexEnd() != 0))
+ (RegInfo->hasStackRealignment(MF) && getObjectIndexEnd() != 0))
StackAlign = TFI->getStackAlign();
else
StackAlign = TFI->getTransientStackAlign();
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 1c0e4f3aa1f7a..13d3a0536e1d5 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -877,10 +877,9 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &MF) {
// incoming stack pointer if a frame pointer is required and is closer
// to the incoming rather than the final stack pointer.
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
- bool EarlyScavengingSlots = (TFI.hasFP(MF) &&
- TFI.isFPCloseToIncomingSP() &&
+ bool EarlyScavengingSlots = (TFI.hasFP(MF) && TFI.isFPCloseToIncomingSP() &&
RegInfo->useFPForScavengingIndex(MF) &&
- !RegInfo->needsStackRealignment(MF));
+ !RegInfo->hasStackRealignment(MF));
if (RS && EarlyScavengingSlots) {
SmallVector<int, 2> SFIs;
RS->getScavengingFrameIndices(SFIs);
@@ -1063,7 +1062,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &MF) {
// value.
Align StackAlign;
if (MFI.adjustsStack() || MFI.hasVarSizedObjects() ||
- (RegInfo->needsStackRealignment(MF) && MFI.getObjectIndexEnd() != 0))
+ (RegInfo->hasStackRealignment(MF) && MFI.getObjectIndexEnd() != 0))
StackAlign = TFI.getStackAlign();
else
StackAlign = TFI.getTransientStackAlign();
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index e5be4aeb8668c..8bf9410e332b0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6243,7 +6243,7 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
// Don't promote to an alignment that would require dynamic stack
// realignment.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->needsStackRealignment(MF))
+ if (!TRI->hasStackRealignment(MF))
while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
NewAlign = NewAlign / 2;
diff --git a/llvm/lib/CodeGen/StackMaps.cpp b/llvm/lib/CodeGen/StackMaps.cpp
index faf07e90c39cc..36e8f129ea158 100644
--- a/llvm/lib/CodeGen/StackMaps.cpp
+++ b/llvm/lib/CodeGen/StackMaps.cpp
@@ -511,7 +511,7 @@ void StackMaps::recordStackMapOpers(const MCSymbol &MILabel,
const MachineFrameInfo &MFI = AP.MF->getFrameInfo();
const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
bool HasDynamicFrameSize =
- MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(*(AP.MF));
+ MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(*(AP.MF));
uint64_t FrameSize = HasDynamicFrameSize ? UINT64_MAX : MFI.getStackSize();
auto CurrentIt = FnInfos.find(AP.CurrentFnSym);
diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
index be47e5f84f1e2..22e1d5408740a 100644
--- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
@@ -461,21 +461,13 @@ bool TargetRegisterInfo::canRealignStack(const MachineFunction &MF) const {
return !MF.getFunction().hasFnAttribute("no-realign-stack");
}
-bool TargetRegisterInfo::needsStackRealignment(
- const MachineFunction &MF) const {
+bool TargetRegisterInfo::shouldRealignStack(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
const Function &F = MF.getFunction();
- Align StackAlign = TFI->getStackAlign();
- bool requiresRealignment = ((MFI.getMaxAlign() > StackAlign) ||
- F.hasFnAttribute(Attribute::StackAlignment));
- if (F.hasFnAttribute("stackrealign") || requiresRealignment) {
- if (canRealignStack(MF))
- return true;
- LLVM_DEBUG(dbgs() << "Can't realign function's stack: " << F.getName()
- << "\n");
- }
- return false;
+ return F.hasFnAttribute("stackrealign") ||
+ (MFI.getMaxAlign() > TFI->getStackAlign()) ||
+ F.hasFnAttribute(Attribute::StackAlignment);
}
bool TargetRegisterInfo::regmaskSubsetEqual(const uint32_t *mask0,
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index f5df1c5e2929f..06cc68155c374 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -252,7 +252,7 @@ bool AArch64FrameLowering::homogeneousPrologEpilog(
// Bail on stack adjustment needed on return for simplicity.
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
- if (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF))
+ if (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF))
return false;
if (Exit && getArgumentPopSize(MF, *Exit))
return false;
@@ -363,7 +363,7 @@ bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const {
return true;
if (MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
MFI.hasStackMap() || MFI.hasPatchPoint() ||
- RegInfo->needsStackRealignment(MF))
+ RegInfo->hasStackRealignment(MF))
return true;
// With large callframes around we may need to use FP to access the scavenging
// emergency spillslot.
@@ -616,7 +616,7 @@ bool AArch64FrameLowering::canUseAsPrologue(
const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
// Don't need a scratch register if we're not going to re-align the stack.
- if (!RegInfo->needsStackRealignment(*MF))
+ if (!RegInfo->hasStackRealignment(*MF))
return true;
// Otherwise, we can use any block as long as it has a scratch register
// available.
@@ -678,7 +678,7 @@ bool AArch64FrameLowering::shouldCombineCSRLocalStackBump(
if (MFI.hasVarSizedObjects())
return false;
- if (RegInfo->needsStackRealignment(MF))
+ if (RegInfo->hasStackRealignment(MF))
return false;
// This isn't strictly necessary, but it simplifies things a bit since the
@@ -1375,7 +1375,7 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
if (NumBytes) {
// Alignment is required for the parent frame, not the funclet
const bool NeedsRealignment =
- !IsFunclet && RegInfo->needsStackRealignment(MF);
+ !IsFunclet && RegInfo->hasStackRealignment(MF);
unsigned scratchSPReg = AArch64::SP;
if (NeedsRealignment) {
@@ -1981,13 +1981,13 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
// Argument access should always use the FP.
if (isFixed) {
UseFP = hasFP(MF);
- } else if (isCSR && RegInfo->needsStackRealignment(MF)) {
+ } else if (isCSR && RegInfo->hasStackRealignment(MF)) {
// References to the CSR area must use FP if we're re-aligning the stack
// since the dynamically-sized alignment padding is between the SP/BP and
// the CSR area.
assert(hasFP(MF) && "Re-aligned stack must have frame pointer");
UseFP = true;
- } else if (hasFP(MF) && !RegInfo->needsStackRealignment(MF)) {
+ } else if (hasFP(MF) && !RegInfo->hasStackRealignment(MF)) {
// If the FPOffset is negative and we're producing a signed immediate, we
// have to keep in mind that the available offset range for negative
// offsets is smaller than for positive ones. If an offset is available
@@ -2029,9 +2029,10 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
}
}
- assert(((isFixed || isCSR) || !RegInfo->needsStackRealignment(MF) || !UseFP) &&
- "In the presence of dynamic stack pointer realignment, "
- "non-argument/CSR objects cannot be accessed through the frame pointer");
+ assert(
+ ((isFixed || isCSR) || !RegInfo->hasStackRealignment(MF) || !UseFP) &&
+ "In the presence of dynamic stack pointer realignment, "
+ "non-argument/CSR objects cannot be accessed through the frame pointer");
if (isSVE) {
StackOffset FPOffset =
@@ -2041,10 +2042,9 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
StackOffset::get(MFI.getStackSize() - AFI->getCalleeSavedStackSize(),
ObjectOffset);
// Always use the FP for SVE spills if available and beneficial.
- if (hasFP(MF) &&
- (SPOffset.getFixed() ||
- FPOffset.getScalable() < SPOffset.getScalable() ||
- RegInfo->needsStackRealignment(MF))) {
+ if (hasFP(MF) && (SPOffset.getFixed() ||
+ FPOffset.getScalable() < SPOffset.getScalable() ||
+ RegInfo->hasStackRealignment(MF))) {
FrameReg = RegInfo->getFrameRegister(MF);
return FPOffset;
}
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index f90856d14b2fe..9f1b791e18b5e 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -382,7 +382,7 @@ bool AArch64RegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// stack needs to be dynamically re-aligned, the base pointer is the only
// reliable way to reference the locals.
if (MFI.hasVarSizedObjects() || MF.hasEHFunclets()) {
- if (needsStackRealignment(MF))
+ if (hasStackRealignment(MF))
return true;
if (MF.getSubtarget<AArch64Subtarget>().hasSVE()) {
@@ -437,7 +437,7 @@ AArch64RegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const {
assert((!MF.getSubtarget<AArch64Subtarget>().hasSVE() ||
AFI->hasCalculatedStackSizeSVE()) &&
"Expected SVE area to be calculated by this point");
- return TFI.hasFP(MF) && !needsStackRealignment(MF) && !AFI->getStackSizeSVE();
+ return TFI.hasFP(MF) && !hasStackRealignment(MF) && !AFI->getStackSizeSVE();
}
bool AArch64RegisterInfo::requiresFrameIndexScavenging(
@@ -761,7 +761,7 @@ unsigned AArch64RegisterInfo::getLocalAddressRegister(
const auto &MFI = MF.getFrameInfo();
if (!MF.hasEHFunclets() && !MFI.hasVarSizedObjects())
return AArch64::SP;
- else if (needsStackRealignment(MF))
+ else if (hasStackRealignment(MF))
return getBaseRegister();
return getFrameRegister(MF);
}
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 6ae069108adca..afa69b225cc72 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -1012,7 +1012,7 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
}
}
- if (TRI.needsStackRealignment(MF)) {
+ if (TRI.hasStackRealignment(MF)) {
HasFP = true;
const unsigned Alignment = MFI.getMaxAlign().value();
@@ -1445,8 +1445,9 @@ bool SIFrameLowering::hasFP(const MachineFunction &MF) const {
}
return frameTriviallyRequiresSP(MFI) || MFI.isFrameAddressTaken() ||
- MF.getSubtarget<GCNSubtarget>().getRegisterInfo()->needsStackRealignment(MF) ||
- MF.getTarget().Options.DisableFramePointerElim(MF);
+ MF.getSubtarget<GCNSubtarget>().getRegisterInfo()->hasStackRealignment(
+ MF) ||
+ MF.getTarget().Options.DisableFramePointerElim(MF);
}
// This is essentially a reduced version of hasFP for entry functions. Since the
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index c6ecf2a66e9cc..4f23dac0ec32f 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -176,7 +176,7 @@ bool SIRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// When we need stack realignment, we can't reference off of the
// stack pointer, so we reserve a base pointer.
const MachineFrameInfo &MFI = MF.getFrameInfo();
- return MFI.getNumFixedObjects() && needsStackRealignment(MF);
+ return MFI.getNumFixedObjects() && shouldRealignStack(MF);
}
Register SIRegisterInfo::getBaseRegister() const { return AMDGPU::SGPR34; }
@@ -358,7 +358,7 @@ BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
return Reserved;
}
-bool SIRegisterInfo::canRealignStack(const MachineFunction &MF) const {
+bool SIRegisterInfo::shouldRealignStack(const MachineFunction &MF) const {
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
// On entry, the base address is 0, so it can't possibly need any more
// alignment.
@@ -368,7 +368,7 @@ bool SIRegisterInfo::canRealignStack(const MachineFunction &MF) const {
if (Info->isEntryFunction())
return false;
- return TargetRegisterInfo::canRealignStack(MF);
+ return TargetRegisterInfo::shouldRealignStack(MF);
}
bool SIRegisterInfo::requiresRegisterScavenging(const MachineFunction &Fn) const {
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 5d360677bed64..96bef205b8479 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -79,7 +79,7 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
bool hasBasePointer(const MachineFunction &MF) const;
Register getBaseRegister() const;
- bool canRealignStack(const MachineFunction &MF) const override;
+ bool shouldRealignStack(const MachineFunction &MF) const override;
bool requiresRegisterScavenging(const MachineFunction &Fn) const override;
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
diff --git a/llvm/lib/Target/ARC/ARCFrameLowering.cpp b/llvm/lib/Target/ARC/ARCFrameLowering.cpp
index ead5931062628..6b5802d972eb7 100644
--- a/llvm/lib/Target/ARC/ARCFrameLowering.cpp
+++ b/llvm/lib/Target/ARC/ARCFrameLowering.cpp
@@ -493,6 +493,6 @@ bool ARCFrameLowering::hasFP(const MachineFunction &MF) const {
bool HasFP = MF.getTarget().Options.DisableFramePointerElim(MF) ||
MF.getFrameInfo().hasVarSizedObjects() ||
MF.getFrameInfo().isFrameAddressTaken() ||
- RegInfo->needsStackRealignment(MF);
+ RegInfo->hasStackRealignment(MF);
return HasFP;
}
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 1a264dabeeb51..b702b5319fafd 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -403,7 +403,7 @@ bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// If we have stack realignment and VLAs, we have no pointer to use to
// access the stack. If we have stack realignment, and a large call frame,
// we have no place to allocate the emergency spill slot.
- if (needsStackRealignment(MF) && !TFI->hasReservedCallFrame(MF))
+ if (hasStackRealignment(MF) && !TFI->hasReservedCallFrame(MF))
return true;
// Thumb has trouble with negative offsets from the FP. Thumb2 has a limited
@@ -458,8 +458,8 @@ cannotEliminateFrame(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack())
return true;
- return MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken()
- || needsStackRealignment(MF);
+ return MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
+ hasStackRealignment(MF);
}
Register
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index a7f1765a93115..5fe8e96fa2ec3 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -2234,7 +2234,7 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
*TII);
}
// If there's dynamic realignment, adjust for it.
- if (RI.needsStackRealignment(MF)) {
+ if (RI.hasStackRealignment(MF)) {
MachineFrameInfo &MFI = MF.getFrameInfo();
Align MaxAlign = MFI.getMaxAlign();
assert (!AFI->isThumb1OnlyFunction());
@@ -2251,7 +2251,6 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
.add(predOps(ARMCC::AL))
.add(condCodeOp());
}
-
}
MI.eraseFromParent();
return true;
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 4c14000737016..fea771831b4dd 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -206,8 +206,7 @@ bool ARMFrameLowering::hasFP(const MachineFunction &MF) const {
return true;
// Frame pointer required for use within this function.
- return (RegInfo->needsStackRealignment(MF) ||
- MFI.hasVarSizedObjects() ||
+ return (RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
MFI.isFrameAddressTaken());
}
@@ -807,7 +806,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
// sure if we also have VLAs, we have a base pointer for frame access.
// If aligned NEON registers were spilled, the stack has already been
// realigned.
- if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->needsStackRealignment(MF)) {
+ if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->hasStackRealignment(MF)) {
Align MaxAlign = MFI.getMaxAlign();
assert(!AFI->isThumb1OnlyFunction());
if (!AFI->isThumbFunction()) {
@@ -1005,7 +1004,7 @@ int ARMFrameLowering::ResolveFrameIndexReference(const MachineFunction &MF,
// When dynamically realigning the stack, use the frame pointer for
// parameters, and the stack/base pointer for locals.
- if (RegInfo->needsStackRealignment(MF)) {
+ if (RegInfo->hasStackRealignment(MF)) {
assert(hasFP(MF) && "dynamic stack realignment without a FP!");
if (isFixed) {
FrameReg = RegInfo->getFrameRegister(MF);
@@ -1783,7 +1782,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
// instruction.
// FIXME: It will be better just to find spare register here.
if (AFI->isThumb2Function() &&
- (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF)))
+ (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF)))
SavedRegs.set(ARM::R4);
// If a stack probe will be emitted, spill R4 and LR, since they are
@@ -1808,7 +1807,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
// changes it, it'll be a spill, which implies we've used all the registers
// and so R4 is already used, so not marking it here will be OK.
// FIXME: It will be better just to find spare register here.
- if (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF) ||
+ if (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF) ||
MFI.estimateStackSize(MF) > 508)
SavedRegs.set(ARM::R4);
}
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
index d568e9afe432e..003f6e5e17896 100644
--- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -403,7 +403,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
- if (RegInfo->needsStackRealignment(MF)) {
+ if (RegInfo->hasStackRealignment(MF)) {
const unsigned NrBitsToZero = Log2(MFI.getMaxAlign());
// Emit the following sequence, using R4 as a temporary, since we cannot use
// SP as a source or destination register for the shifts:
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index a62610ae2b7cd..edb45b3e422cb 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -576,7 +576,7 @@ static bool enableAllocFrameElim(const MachineFunction &MF) {
const auto &MFI = MF.getFrameInfo();
const auto &HST = MF.getSubtarget<HexagonSubtarget>();
assert(!MFI.hasVarSizedObjects() &&
- !HST.getRegisterInfo()->needsStackRealignment(MF));
+ !HST.getRegisterInfo()->hasStackRealignment(MF));
return F.hasFnAttribute(Attribute::NoReturn) &&
F.hasFnAttribute(Attribute::NoUnwind) &&
!F.hasFnAttribute(Attribute::UWTable) && HST.noreturnStackElim() &&
@@ -1145,7 +1145,7 @@ bool HexagonFrameLowering::hasFP(const MachineFunction &MF) const {
auto &MFI = MF.getFrameInfo();
auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
- bool HasExtraAlign = HRI.needsStackRealignment(MF);
+ bool HasExtraAlign = HRI.hasStackRealignment(MF);
bool HasAlloca = MFI.hasVarSizedObjects();
// Insert ALLOCFRAME if we need to or at -O0 for the debugger. Think
@@ -1265,7 +1265,7 @@ HexagonFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
int Offset = MFI.getObjectOffset(FI);
bool HasAlloca = MFI.hasVarSizedObjects();
- bool HasExtraAlign = HRI.needsStackRealignment(MF);
+ bool HasExtraAlign = HRI.hasStackRealignment(MF);
bool NoOpt = MF.getTarget().getOptLevel() == CodeGenOpt::None;
auto &HMFI = *MF.getInfo<HexagonMachineFunctionInfo>();
diff --git a/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp b/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
index 3c84ed057fd19..3a2d5030775e7 100644
--- a/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
+++ b/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
@@ -33,7 +33,7 @@ void LanaiFrameLowering::determineFrameLayout(MachineFunction &MF) const {
// Get the alignment.
Align StackAlign =
- LRI->needsStackRealignment(MF) ? MFI.getMaxAlign() : getStackAlign();
+ LRI->hasStackRealignment(MF) ? MFI.getMaxAlign() : getStackAlign();
// Get the maximum call frame size of all the calls.
unsigned MaxCallFrameSize = MFI.getMaxCallFrameSize();
diff --git a/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp b/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
index 64f87ae5f9630..abe20c8e18cf4 100644
--- a/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
+++ b/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
@@ -147,14 +147,14 @@ void LanaiRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// Addressable stack objects are addressed using neg. offsets from fp
// or pos. offsets from sp/basepointer
- if (!HasFP || (needsStackRealignment(MF) && FrameIndex >= 0))
+ if (!HasFP || (hasStackRealignment(MF) && FrameIndex >= 0))
Offset += MF.getFrameInfo().getStackSize();
Register FrameReg = getFrameRegister(MF);
if (FrameIndex >= 0) {
if (hasBasePointer(MF))
FrameReg = getBaseRegister();
- else if (needsStackRealignment(MF))
+ else if (hasStackRealignment(MF))
FrameReg = Lanai::SP;
}
@@ -245,7 +245,7 @@ bool LanaiRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
// When we need stack realignment and there are dynamic allocas, we can't
// reference off of the stack pointer, so we reserve a base pointer.
- if (needsStackRealignment(MF) && MFI.hasVarSizedObjects())
+ if (hasStackRealignment(MF) && MFI.hasVarSizedObjects())
return true;
return false;
diff --git a/llvm/lib/Target/M68k/M68kFrameLowering.cpp b/llvm/lib/Target/M68k/M68kFrameLowering.cpp
index 884ddca2389e5..f9a187aac3a93 100644
--- a/llvm/lib/Target/M68k/M68kFrameLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kFrameLowering.cpp
@@ -46,7 +46,7 @@ bool M68kFrameLowering::hasFP(const MachineFunction &MF) const {
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
- TRI->needsStackRealignment(MF);
+ TRI->hasStackRealignment(MF);
}
// FIXME Make sure no other factors prevent us from reserving call frame
@@ -58,7 +58,7 @@ bool M68kFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
bool M68kFrameLowering::canSimplifyCallFramePseudos(
const MachineFunction &MF) const {
return hasReservedCallFrame(MF) ||
- (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
+ (hasFP(MF) && !TRI->hasStackRealignment(MF)) ||
TRI->hasBasePointer(MF);
}
@@ -82,7 +82,7 @@ M68kFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
// have dynamic allocas in addition to dynamic realignment.
if (TRI->hasBasePointer(MF))
FrameReg = TRI->getBaseRegister();
- else if (TRI->needsStackRealignment(MF))
+ else if (TRI->hasStackRealignment(MF))
FrameReg = TRI->getStackRegister();
else
FrameReg = TRI->getFrameRegister(MF);
@@ -107,7 +107,7 @@ M68kFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
assert((-(Offset + StackSize)) % MFI.getObjectAlign(FI).value() == 0);
return StackOffset::getFixed(Offset + StackSize);
}
- if (TRI->needsStackRealignment(MF)) {
+ if (TRI->hasStackRealignment(MF)) {
if (FI < 0) {
// Skip the saved FP.
return StackOffset::getFixed(Offset + SlotSize);
@@ -538,7 +538,7 @@ void M68kFrameLowering::emitPrologue(MachineFunction &MF,
NumBytes = FrameSize - MMFI->getCalleeSavedFrameSize();
// Callee-saved registers are pushed on stack before the stack is realigned.
- if (TRI->needsStackRealignment(MF))
+ if (TRI->hasStackRealignment(MF))
NumBytes = alignTo(NumBytes, MaxAlign);
// Get the offset of the stack slot for the FP register, which is
@@ -608,7 +608,7 @@ void M68kFrameLowering::emitPrologue(MachineFunction &MF,
// Realign stack after we pushed callee-saved registers (so that we'll be
// able to calculate their offsets from the frame pointer).
- if (TRI->needsStackRealignment(MF)) {
+ if (TRI->hasStackRealignment(MF)) {
assert(HasFP && "There should be a frame pointer if stack is realigned.");
BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
}
@@ -699,7 +699,7 @@ void M68kFrameLowering::emitEpilogue(MachineFunction &MF,
// Callee-saved registers were pushed on stack before the stack was
// realigned.
- if (TRI->needsStackRealignment(MF))
+ if (TRI->hasStackRealignment(MF))
NumBytes = alignTo(FrameSize, MaxAlign);
// Pop FP.
@@ -734,8 +734,8 @@ void M68kFrameLowering::emitEpilogue(MachineFunction &MF,
// slot before popping them off! Same applies for the case, when stack was
// realigned. Don't do this if this was a funclet epilogue, since the funclets
// will not do realignment or dynamic stack allocation.
- if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects())) {
- if (TRI->needsStackRealignment(MF))
+ if ((TRI->hasStackRealignment(MF) || MFI.hasVarSizedObjects())) {
+ if (TRI->hasStackRealignment(MF))
MBBI = FirstCSPop;
uint64_t LEAAmount = -CSSize;
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp
index cf9f1406b0c1c..8402bbbeefffd 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp
@@ -1186,7 +1186,7 @@ bool M68kTargetLowering::IsEligibleForTailCallOptimization(
// Can't do sibcall if stack needs to be dynamically re-aligned. PEI needs to
// emit a special epilogue.
const M68kRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
- if (RegInfo->needsStackRealignment(MF))
+ if (RegInfo->hasStackRealignment(MF))
return false;
// Also avoid sibcall optimization if either caller or callee uses struct
diff --git a/llvm/lib/Target/M68k/M68kRegisterInfo.cpp b/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
index 8ed28780cf3a6..288954aa0a14e 100644
--- a/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
@@ -176,7 +176,7 @@ void M68kRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
unsigned BasePtr;
if (hasBasePointer(MF))
BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister());
- else if (needsStackRealignment(MF))
+ else if (hasStackRealignment(MF))
BasePtr = (FIndex < 0 ? FramePtr : StackPtr);
else if (AfterFPPop)
BasePtr = StackPtr;
@@ -228,7 +228,7 @@ bool M68kRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// can't address variables from the stack pointer. MS inline asm can
// reference locals while also adjusting the stack pointer. When we can't
// use both the SP and the FP, we need a separate base pointer register.
- bool CantUseFP = needsStackRealignment(MF);
+ bool CantUseFP = hasStackRealignment(MF);
return CantUseFP && CantUseSP(MFI);
}
diff --git a/llvm/lib/Target/Mips/MipsFrameLowering.cpp b/llvm/lib/Target/Mips/MipsFrameLowering.cpp
index 8d5eabf59b713..99d225f9abfe8 100644
--- a/llvm/lib/Target/Mips/MipsFrameLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsFrameLowering.cpp
@@ -95,15 +95,15 @@ bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
- MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
- TRI->needsStackRealignment(MF);
+ MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
+ TRI->hasStackRealignment(MF);
}
bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
+ return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
}
// Estimate the size of the stack, including the incoming arguments. We need to
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 3452bf495a34a..7cba3118cd627 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -198,8 +198,7 @@ getReservedRegs(const MachineFunction &MF) const {
// Reserve the base register if we need to both realign the stack and
// allocate variable-sized objects at runtime. This should test the
// same conditions as MipsFrameLowering::hasBP().
- if (needsStackRealignment(MF) &&
- MF.getFrameInfo().hasVarSizedObjects()) {
+ if (hasStackRealignment(MF) && MF.getFrameInfo().hasVarSizedObjects()) {
Reserved.set(Mips::S7);
Reserved.set(Mips::S7_64);
}
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
index f31ba06a1e7cf..bb4b9c6fa6a72 100644
--- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -535,7 +535,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);
- if (RegInfo.needsStackRealignment(MF)) {
+ if (RegInfo.hasStackRealignment(MF)) {
// addiu $Reg, $zero, -MaxAlignment
// andi $sp, $sp, $Reg
Register VR = MF.getRegInfo().createVirtualRegister(RC);
diff --git a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
index a48088c289195..b05e9ad827c40 100644
--- a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
@@ -180,7 +180,7 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
if ((FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) || EhDataRegFI ||
IsISRRegFI)
FrameReg = ABI.GetStackPtr();
- else if (RegInfo->needsStackRealignment(MF)) {
+ else if (RegInfo->hasStackRealignment(MF)) {
if (MFI.hasVarSizedObjects() && !MFI.isFixedObjectIndex(FrameIndex))
FrameReg = ABI.GetBasePtr();
else if (MFI.isFixedObjectIndex(FrameIndex))
diff --git a/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp b/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
index 0c1f741ef1da6..8e2299e652221 100644
--- a/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
@@ -238,7 +238,7 @@ NVPTXPrologEpilogPass::calculateFrameObjectOffsets(MachineFunction &Fn) {
// value.
Align StackAlign;
if (MFI.adjustsStack() || MFI.hasVarSizedObjects() ||
- (RegInfo->needsStackRealignment(Fn) && MFI.getObjectIndexEnd() != 0))
+ (RegInfo->hasStackRealignment(Fn) && MFI.getObjectIndexEnd() != 0))
StackAlign = TFI.getStackAlign();
else
StackAlign = TFI.getTransientStackAlign();
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 171bb77a55a83..cb3d3d200bf79 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -1349,7 +1349,7 @@ bool PPCRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// If we need to realign the stack, then the stack pointer can no longer
// serve as an offset into the caller's stack space. As a result, we need a
// base pointer.
- return needsStackRealignment(MF);
+ return hasStackRealignment(MF);
}
/// Returns true if the instruction's frame index
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 760bfa4c910fb..5ef608316a393 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -221,7 +221,7 @@ bool RISCVFrameLowering::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
- RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
+ RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
MFI.isFrameAddressTaken();
}
@@ -229,7 +229,7 @@ bool RISCVFrameLowering::hasBP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
+ return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
}
// Determines the size of the frame and maximum call frame size.
@@ -486,7 +486,7 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
if (hasFP(MF)) {
// Realign Stack
const RISCVRegisterInfo *RI = STI.getRegisterInfo();
- if (RI->needsStackRealignment(MF)) {
+ if (RI->hasStackRealignment(MF)) {
Align MaxAlignment = MFI.getMaxAlign();
const RISCVInstrInfo *TII = STI.getInstrInfo();
@@ -568,7 +568,7 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
// Restore the stack pointer using the value of the frame pointer. Only
// necessary if the stack pointer was modified, meaning the stack size is
// unknown.
- if (RI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) {
+ if (RI->hasStackRealignment(MF) || MFI.hasVarSizedObjects()) {
assert(hasFP(MF) && "frame pointer should not have been eliminated");
adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset,
MachineInstr::FrameDestroy);
@@ -639,7 +639,7 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
else
Offset +=
StackOffset::getFixed(MFI.getStackSize() + RVFI->getRVVPadding());
- } else if (RI->needsStackRealignment(MF) && !MFI.isFixedObjectIndex(FI)) {
+ } else if (RI->hasStackRealignment(MF) && !MFI.isFixedObjectIndex(FI)) {
// If the stack was realigned, the frame pointer is set in order to allow
// SP to be restored, so we need another base register to record the stack
// after realignment.
diff --git a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
index 63187fdce9994..d165052ca5125 100644
--- a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
@@ -97,14 +97,9 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF,
// Debug location must be unknown since the first debug location is used
// to determine the end of the prologue.
DebugLoc dl;
- bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
-
- // FIXME: unfortunately, returning false from canRealignStack
- // actually just causes needsStackRealignment to return false,
- // rather than reporting an error, as would be sensible. This is
- // poor, but fixing that bogosity is going to be a large project.
- // For now, just see if it's lied, and report an error here.
- if (!NeedsStackRealignment && MFI.getMaxAlign() > getStackAlign())
+ bool NeedsStackRealignment = RegInfo.shouldRealignStack(MF);
+
+ if (NeedsStackRealignment && !RegInfo.canRealignStack(MF))
report_fatal_error("Function \"" + Twine(MF.getName()) + "\" required "
"stack re-alignment, but LLVM couldn't handle it "
"(probably because it has a dynamic alloca).");
@@ -252,9 +247,8 @@ bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
- RegInfo->needsStackRealignment(MF) ||
- MFI.hasVarSizedObjects() ||
- MFI.isFrameAddressTaken();
+ RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
+ MFI.isFrameAddressTaken();
}
StackOffset
@@ -280,7 +274,7 @@ SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
} else if (isFixed) {
// Otherwise, argument access should always use %fp.
UseFP = true;
- } else if (RegInfo->needsStackRealignment(MF)) {
+ } else if (RegInfo->hasStackRealignment(MF)) {
// If there is dynamic stack realignment, all local object
// references need to be via %sp, to take account of the
// re-alignment.
diff --git a/llvm/lib/Target/VE/VEFrameLowering.cpp b/llvm/lib/Target/VE/VEFrameLowering.cpp
index 9e97d0eca833b..1ae3a2c43f9f1 100644
--- a/llvm/lib/Target/VE/VEFrameLowering.cpp
+++ b/llvm/lib/Target/VE/VEFrameLowering.cpp
@@ -313,18 +313,13 @@ void VEFrameLowering::emitPrologue(MachineFunction &MF,
const VEInstrInfo &TII = *STI.getInstrInfo();
const VERegisterInfo &RegInfo = *STI.getRegisterInfo();
MachineBasicBlock::iterator MBBI = MBB.begin();
- bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
+ bool NeedsStackRealignment = RegInfo.shouldRealignStack(MF);
// Debug location must be unknown since the first debug location is used
// to determine the end of the prologue.
DebugLoc DL;
- // FIXME: unfortunately, returning false from canRealignStack
- // actually just causes needsStackRealignment to return false,
- // rather than reporting an error, as would be sensible. This is
- // poor, but fixing that bogosity is going to be a large project.
- // For now, just see if it's lied, and report an error here.
- if (!NeedsStackRealignment && MFI.getMaxAlign() > getStackAlign())
+ if (NeedsStackRealignment && !RegInfo.canRealignStack(MF))
report_fatal_error("Function \"" + Twine(MF.getName()) +
"\" required "
"stack re-alignment, but LLVM couldn't handle it "
@@ -428,7 +423,7 @@ bool VEFrameLowering::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
- RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
+ RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
MFI.isFrameAddressTaken();
}
@@ -436,7 +431,7 @@ bool VEFrameLowering::hasBP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
+ return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
}
bool VEFrameLowering::hasGOT(const MachineFunction &MF) const {
@@ -461,7 +456,7 @@ StackOffset VEFrameLowering::getFrameIndexReference(const MachineFunction &MF,
return StackOffset::getFixed(FrameOffset +
MF.getFrameInfo().getStackSize());
}
- if (RegInfo->needsStackRealignment(MF) && !isFixed) {
+ if (RegInfo->hasStackRealignment(MF) && !isFixed) {
// If data on stack require realignemnt, frame indexies are based on a %sp
// or %s17 (bp) register. If there is a variable sized object, bp is used.
if (hasBP(MF))
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
index 95669932e73f5..c5a27fd03fce4 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
@@ -46,7 +46,7 @@ using namespace llvm;
bool WebAssemblyFrameLowering::hasBP(const MachineFunction &MF) const {
const auto *RegInfo =
MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
- return RegInfo->needsStackRealignment(MF);
+ return RegInfo->hasStackRealignment(MF);
}
/// Return true if the specified function should have a dedicated frame pointer
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 245bd7a286a1c..663c9a3fc6a56 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -70,7 +70,7 @@ bool
X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
return hasReservedCallFrame(MF) ||
MF.getInfo<X86MachineFunctionInfo>()->hasPreallocatedCall() ||
- (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
+ (hasFP(MF) && !TRI->hasStackRealignment(MF)) ||
TRI->hasBasePointer(MF);
}
@@ -93,7 +93,7 @@ X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const {
bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
- TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
+ TRI->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
MFI.isFrameAddressTaken() || MFI.hasOpaqueSPAdjustment() ||
MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
MF.getInfo<X86MachineFunctionInfo>()->hasPreallocatedCall() ||
@@ -534,7 +534,7 @@ void X86FrameLowering::emitStackProbeInlineGeneric(
uint64_t ProbeChunk = StackProbeSize * 8;
uint64_t MaxAlign =
- TRI->needsStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0;
+ TRI->hasStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0;
// Synthesize a loop or unroll it, depending on the number of iterations.
// BuildStackAlignAND ensures that only MaxAlign % StackProbeSize bits left
@@ -1351,7 +1351,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// pointer, calls, or dynamic alloca then we do not need to adjust the
// stack pointer (we fit in the Red Zone). We also check that we don't
// push and pop from the stack.
- if (has128ByteRedZone(MF) && !TRI->needsStackRealignment(MF) &&
+ if (has128ByteRedZone(MF) && !TRI->hasStackRealignment(MF) &&
!MFI.hasVarSizedObjects() && // No dynamic alloca.
!MFI.adjustsStack() && // No calls.
!EmitStackProbeCall && // No stack probes.
@@ -1420,7 +1420,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
// Callee-saved registers are pushed on stack before the stack is realigned.
- if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
+ if (TRI->hasStackRealignment(MF) && !IsWin64Prologue)
NumBytes = alignTo(NumBytes, MaxAlign);
// Save EBP/RBP into the appropriate stack slot.
@@ -1481,7 +1481,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// Update the offset adjustment, which is mainly used by codeview to translate
// from ESP to VFRAME relative local variable offsets.
if (!IsFunclet) {
- if (HasFP && TRI->needsStackRealignment(MF))
+ if (HasFP && TRI->hasStackRealignment(MF))
MFI.setOffsetAdjustment(-NumBytes);
else
MFI.setOffsetAdjustment(-StackSize);
@@ -1525,7 +1525,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// Realign stack after we pushed callee-saved registers (so that we'll be
// able to calculate their offsets from the frame pointer).
// Don't do this for Win64, it needs to realign the stack after the prologue.
- if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
+ if (!IsWin64Prologue && !IsFunclet && TRI->hasStackRealignment(MF)) {
assert(HasFP && "There should be a frame pointer if stack is realigned.");
BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
@@ -1553,7 +1553,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// increments is necessary to ensure that the guard pages used by the OS
// virtual memory manager are allocated in correct sequence.
uint64_t AlignedNumBytes = NumBytes;
- if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
+ if (IsWin64Prologue && !IsFunclet && TRI->hasStackRealignment(MF))
AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
if (AlignedNumBytes >= StackProbeSize && EmitStackProbeCall) {
assert(!X86FI->getUsesRedZone() &&
@@ -1748,7 +1748,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// Realign stack after we spilled callee-saved registers (so that we'll be
// able to calculate their offsets from the frame pointer).
// Win64 requires aligning the stack after the prologue.
- if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
+ if (IsWin64Prologue && TRI->hasStackRealignment(MF)) {
assert(HasFP && "There should be a frame pointer if stack is realigned.");
BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
}
@@ -1949,7 +1949,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
// Callee-saved registers were pushed on stack before the stack was
// realigned.
- if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
+ if (TRI->hasStackRealignment(MF) && !IsWin64Prologue)
NumBytes = alignTo(FrameSize, MaxAlign);
} else {
NumBytes = StackSize - CSSize;
@@ -2011,9 +2011,9 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
// slot before popping them off! Same applies for the case, when stack was
// realigned. Don't do this if this was a funclet epilogue, since the funclets
// will not do realignment or dynamic stack allocation.
- if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
+ if (((TRI->hasStackRealignment(MF)) || MFI.hasVarSizedObjects()) &&
!IsFunclet) {
- if (TRI->needsStackRealignment(MF))
+ if (TRI->hasStackRealignment(MF))
MBBI = FirstCSPop;
unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
uint64_t LEAAmount =
@@ -2113,7 +2113,7 @@ StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,
// have dynamic allocas in addition to dynamic realignment.
if (TRI->hasBasePointer(MF))
FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
- else if (TRI->needsStackRealignment(MF))
+ else if (TRI->hasStackRealignment(MF))
FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
else
FrameReg = TRI->getFrameRegister(MF);
@@ -2172,7 +2172,7 @@ StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,
assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize)));
return StackOffset::getFixed(Offset + StackSize);
}
- } else if (TRI->needsStackRealignment(MF)) {
+ } else if (TRI->hasStackRealignment(MF)) {
if (FI < 0) {
// Skip the saved EBP.
return StackOffset::getFixed(Offset + SlotSize + FPDelta);
@@ -2263,7 +2263,7 @@ X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF,
// answer we give is relative to the SP after the prologue, and not the
// SP in the middle of the function.
- if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
+ if (MFI.isFixedObjectIndex(FI) && TRI->hasStackRealignment(MF) &&
!STI.isTargetWin64())
return getFrameIndexReference(MF, FI, FrameReg);
@@ -3247,7 +3247,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
bool X86FrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
assert(MBB.getParent() && "Block is not attached to a function!");
const MachineFunction &MF = *MBB.getParent();
- return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
+ return !TRI->hasStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
}
bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
@@ -3497,7 +3497,7 @@ void X86FrameLowering::orderFrameObjects(
}
// Flip it if we're accessing off of the FP.
- if (!TRI->needsStackRealignment(MF) && hasFP(MF))
+ if (!TRI->hasStackRealignment(MF) && hasFP(MF))
std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c434da6132d70..370ac9377badc 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4623,7 +4623,7 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(
// Can't do sibcall if stack needs to be dynamically re-aligned. PEI needs to
// emit a special epilogue.
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
- if (RegInfo->needsStackRealignment(MF))
+ if (RegInfo->hasStackRealignment(MF))
return false;
// Also avoid sibcall optimization if either caller or callee uses struct
@@ -25845,7 +25845,7 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
if (RegInfo->hasBasePointer(MF))
Reg = RegInfo->getBaseRegister();
else { // Handles the SP or FP case.
- bool CantUseFP = RegInfo->needsStackRealignment(MF);
+ bool CantUseFP = RegInfo->hasStackRealignment(MF);
if (CantUseFP)
Reg = RegInfo->getPtrSizedStackRegister(MF);
else
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 1334d10951d68..9c2970c324a37 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -5701,7 +5701,7 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
Align Alignment = MFI.getObjectAlign(FrameIndex);
// If the function stack isn't realigned we don't want to fold instructions
// that need increased alignment.
- if (!RI.needsStackRealignment(MF))
+ if (!RI.hasStackRealignment(MF))
Alignment =
std::min(Alignment, Subtarget.getFrameLowering()->getStackAlign());
if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 9865216ee3694..899542cdbb335 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -648,7 +648,7 @@ bool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const {
// can't address variables from the stack pointer. MS inline asm can
// reference locals while also adjusting the stack pointer. When we can't
// use both the SP and the FP, we need a separate base pointer register.
- bool CantUseFP = needsStackRealignment(MF);
+ bool CantUseFP = hasStackRealignment(MF);
return CantUseFP && CantUseSP(MFI);
}
@@ -728,8 +728,8 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int FIOffset;
Register BasePtr;
if (MI.isReturn()) {
- assert((!needsStackRealignment(MF) ||
- MF.getFrameInfo().isFixedObjectIndex(FrameIndex)) &&
+ assert((!hasStackRealignment(MF) ||
+ MF.getFrameInfo().isFixedObjectIndex(FrameIndex)) &&
"Return instruction can only reference SP relative frame objects");
FIOffset =
TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed();
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