[llvm] a655f25 - [AArch64] Adds memory operands for indexed loads.
Stelios Ioannou via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 12 01:12:01 PDT 2021
Author: Stelios Ioannou
Date: 2021-04-12T09:11:37+01:00
New Revision: a655f250fef84795e3e46c0bcb824d7b5fbceec6
URL: https://github.com/llvm/llvm-project/commit/a655f250fef84795e3e46c0bcb824d7b5fbceec6
DIFF: https://github.com/llvm/llvm-project/commit/a655f250fef84795e3e46c0bcb824d7b5fbceec6.diff
LOG: [AArch64] Adds memory operands for indexed loads.
This patch adds the memory operands for indexed loads so
that certain optimizations can take place.
Differential Revision: https://reviews.llvm.org/D100215/
Change-Id: I539fcf046ca4ad1e7df1d893f57d751419d8364d
Added:
Modified:
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 94b5d7718d0c3..f70eee6037061 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -1339,6 +1339,11 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
SDValue Ops[] = { Base, Offset, Chain };
SDNode *Res = CurDAG->getMachineNode(Opcode, dl, MVT::i64, DstVT,
MVT::Other, Ops);
+
+ // Transfer memoperands.
+ MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand();
+ CurDAG->setNodeMemRefs(cast<MachineSDNode>(Res), {MemOp});
+
// Either way, we're replacing the node, so tell the caller that.
SDValue LoadedVal = SDValue(Res, 1);
if (InsertTo64) {
diff --git a/llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll b/llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
index 1a9bff7915bac..da5d1c6fff5fa 100644
--- a/llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
+++ b/llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
@@ -8,12 +8,11 @@
define dso_local void @run_test() local_unnamed_addr #0 {
; CHECK-LABEL: run_test:
; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: sub sp, sp, #80 // =80
-; CHECK-NEXT: stp d15, d14, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT: stp d13, d12, [sp, #32] // 16-byte Folded Spill
-; CHECK-NEXT: stp d11, d10, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT: stp d9, d8, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT: .cfi_def_cfa_offset 80
+; CHECK-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
+; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 64
; CHECK-NEXT: .cfi_offset b8, -8
; CHECK-NEXT: .cfi_offset b9, -16
; CHECK-NEXT: .cfi_offset b10, -24
@@ -29,7 +28,6 @@ define dso_local void @run_test() local_unnamed_addr #0 {
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: add x10, x10, :lo12:B+48
; CHECK-NEXT: add x11, x11, :lo12:A
-; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-NEXT: // implicit-def: $q1
; CHECK-NEXT: // implicit-def: $q2
; CHECK-NEXT: // implicit-def: $q3
@@ -62,102 +60,98 @@ define dso_local void @run_test() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB0_1: // %for.cond1.preheader
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: mov x12, xzr
-; CHECK-NEXT: ldr q15, [x8]
; CHECK-NEXT: ldr q14, [x12]
-; CHECK-NEXT: ldr q0, [x10], #64
+; CHECK-NEXT: ldr q15, [x8]
; CHECK-NEXT: ldr x18, [x12]
+; CHECK-NEXT: ldr x0, [x8]
+; CHECK-NEXT: mov x12, v14.d[1]
+; CHECK-NEXT: fmov x13, d14
+; CHECK-NEXT: ldr q14, [x10], #64
; CHECK-NEXT: fmov x15, d15
; CHECK-NEXT: mov x14, v15.d[1]
-; CHECK-NEXT: fmov x13, d14
; CHECK-NEXT: mul x1, x15, x18
-; CHECK-NEXT: mov x16, v0.d[1]
-; CHECK-NEXT: fmov x17, d0
-; CHECK-NEXT: fmov d0, x1
+; CHECK-NEXT: mov x16, v14.d[1]
+; CHECK-NEXT: fmov x17, d14
+; CHECK-NEXT: fmov d14, x1
; CHECK-NEXT: mul x1, x14, x18
-; CHECK-NEXT: mov x12, v14.d[1]
-; CHECK-NEXT: ldr x0, [x8]
-; CHECK-NEXT: mov v0.d[1], x1
+; CHECK-NEXT: mov v14.d[1], x1
; CHECK-NEXT: mul x1, x13, x18
-; CHECK-NEXT: add v12.2d, v12.2d, v0.2d
-; CHECK-NEXT: fmov d0, x1
+; CHECK-NEXT: add v12.2d, v12.2d, v14.2d
+; CHECK-NEXT: fmov d14, x1
; CHECK-NEXT: mul x1, x12, x18
-; CHECK-NEXT: mov v0.d[1], x1
+; CHECK-NEXT: mov v14.d[1], x1
; CHECK-NEXT: mul x1, x17, x18
-; CHECK-NEXT: add v13.2d, v13.2d, v0.2d
-; CHECK-NEXT: add v11.2d, v11.2d, v0.2d
-; CHECK-NEXT: fmov d0, x1
+; CHECK-NEXT: add v13.2d, v13.2d, v14.2d
+; CHECK-NEXT: add v11.2d, v11.2d, v14.2d
+; CHECK-NEXT: fmov d14, x1
; CHECK-NEXT: mul x18, x16, x18
-; CHECK-NEXT: ldr q14, [sp] // 16-byte Folded Reload
-; CHECK-NEXT: mov v0.d[1], x18
+; CHECK-NEXT: mov v14.d[1], x18
; CHECK-NEXT: mul x18, x15, x0
; CHECK-NEXT: add x1, x11, x8
-; CHECK-NEXT: add v10.2d, v10.2d, v0.2d
-; CHECK-NEXT: fmov d0, x18
+; CHECK-NEXT: add v10.2d, v10.2d, v14.2d
+; CHECK-NEXT: fmov d14, x18
; CHECK-NEXT: mul x18, x14, x0
; CHECK-NEXT: ldr x1, [x1, #128]
-; CHECK-NEXT: mov v0.d[1], x18
+; CHECK-NEXT: mov v14.d[1], x18
; CHECK-NEXT: mul x18, x13, x0
-; CHECK-NEXT: add v8.2d, v8.2d, v0.2d
-; CHECK-NEXT: add v25.2d, v25.2d, v0.2d
-; CHECK-NEXT: add v22.2d, v22.2d, v0.2d
-; CHECK-NEXT: add v18.2d, v18.2d, v0.2d
-; CHECK-NEXT: add v6.2d, v6.2d, v0.2d
-; CHECK-NEXT: add v14.2d, v14.2d, v0.2d
-; CHECK-NEXT: fmov d0, x18
+; CHECK-NEXT: add v8.2d, v8.2d, v14.2d
+; CHECK-NEXT: add v25.2d, v25.2d, v14.2d
+; CHECK-NEXT: add v22.2d, v22.2d, v14.2d
+; CHECK-NEXT: add v18.2d, v18.2d, v14.2d
+; CHECK-NEXT: add v6.2d, v6.2d, v14.2d
+; CHECK-NEXT: add v0.2d, v0.2d, v14.2d
+; CHECK-NEXT: fmov d14, x18
; CHECK-NEXT: mul x18, x12, x0
-; CHECK-NEXT: mov v0.d[1], x18
+; CHECK-NEXT: mov v14.d[1], x18
; CHECK-NEXT: mul x18, x17, x0
; CHECK-NEXT: mul x0, x16, x0
-; CHECK-NEXT: add v9.2d, v9.2d, v0.2d
-; CHECK-NEXT: add v31.2d, v31.2d, v0.2d
-; CHECK-NEXT: add v26.2d, v26.2d, v0.2d
-; CHECK-NEXT: add v23.2d, v23.2d, v0.2d
-; CHECK-NEXT: add v21.2d, v21.2d, v0.2d
-; CHECK-NEXT: add v19.2d, v19.2d, v0.2d
-; CHECK-NEXT: add v17.2d, v17.2d, v0.2d
-; CHECK-NEXT: add v7.2d, v7.2d, v0.2d
-; CHECK-NEXT: add v5.2d, v5.2d, v0.2d
-; CHECK-NEXT: add v3.2d, v3.2d, v0.2d
-; CHECK-NEXT: add v2.2d, v2.2d, v0.2d
-; CHECK-NEXT: fmov d0, x18
+; CHECK-NEXT: add v9.2d, v9.2d, v14.2d
+; CHECK-NEXT: add v31.2d, v31.2d, v14.2d
+; CHECK-NEXT: add v26.2d, v26.2d, v14.2d
+; CHECK-NEXT: add v23.2d, v23.2d, v14.2d
+; CHECK-NEXT: add v21.2d, v21.2d, v14.2d
+; CHECK-NEXT: add v19.2d, v19.2d, v14.2d
+; CHECK-NEXT: add v17.2d, v17.2d, v14.2d
+; CHECK-NEXT: add v7.2d, v7.2d, v14.2d
+; CHECK-NEXT: add v5.2d, v5.2d, v14.2d
+; CHECK-NEXT: add v3.2d, v3.2d, v14.2d
+; CHECK-NEXT: add v2.2d, v2.2d, v14.2d
+; CHECK-NEXT: fmov d14, x18
; CHECK-NEXT: mul x15, x15, x1
-; CHECK-NEXT: mov v0.d[1], x0
+; CHECK-NEXT: mov v14.d[1], x0
; CHECK-NEXT: mul x14, x14, x1
-; CHECK-NEXT: add v30.2d, v30.2d, v0.2d
-; CHECK-NEXT: add v24.2d, v24.2d, v0.2d
-; CHECK-NEXT: add v20.2d, v20.2d, v0.2d
-; CHECK-NEXT: add v16.2d, v16.2d, v0.2d
-; CHECK-NEXT: add v4.2d, v4.2d, v0.2d
-; CHECK-NEXT: add v1.2d, v1.2d, v0.2d
-; CHECK-NEXT: fmov d0, x15
+; CHECK-NEXT: add v30.2d, v30.2d, v14.2d
+; CHECK-NEXT: add v24.2d, v24.2d, v14.2d
+; CHECK-NEXT: add v20.2d, v20.2d, v14.2d
+; CHECK-NEXT: add v16.2d, v16.2d, v14.2d
+; CHECK-NEXT: add v4.2d, v4.2d, v14.2d
+; CHECK-NEXT: add v1.2d, v1.2d, v14.2d
+; CHECK-NEXT: fmov d14, x15
; CHECK-NEXT: mul x13, x13, x1
-; CHECK-NEXT: mov v0.d[1], x14
+; CHECK-NEXT: mov v14.d[1], x14
; CHECK-NEXT: mul x12, x12, x1
-; CHECK-NEXT: add v29.2d, v29.2d, v0.2d
-; CHECK-NEXT: fmov d0, x13
+; CHECK-NEXT: add v29.2d, v29.2d, v14.2d
+; CHECK-NEXT: fmov d14, x13
; CHECK-NEXT: mul x17, x17, x1
-; CHECK-NEXT: mov v0.d[1], x12
+; CHECK-NEXT: mov v14.d[1], x12
; CHECK-NEXT: mul x16, x16, x1
-; CHECK-NEXT: add v28.2d, v28.2d, v0.2d
-; CHECK-NEXT: fmov d0, x17
-; CHECK-NEXT: mov v0.d[1], x16
+; CHECK-NEXT: add v28.2d, v28.2d, v14.2d
+; CHECK-NEXT: fmov d14, x17
+; CHECK-NEXT: mov v14.d[1], x16
; CHECK-NEXT: add x8, x8, #8 // =8
-; CHECK-NEXT: add v27.2d, v27.2d, v0.2d
+; CHECK-NEXT: add v27.2d, v27.2d, v14.2d
; CHECK-NEXT: cmp x8, #64 // =64
; CHECK-NEXT: add x9, x9, #1 // =1
-; CHECK-NEXT: str q14, [sp] // 16-byte Folded Spill
; CHECK-NEXT: b.ne .LBB0_1
; CHECK-NEXT: // %bb.2: // %for.cond.cleanup
; CHECK-NEXT: adrp x8, C
; CHECK-NEXT: add x8, x8, :lo12:C
-; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-NEXT: stp q13, q12, [x8]
; CHECK-NEXT: stp q11, q10, [x8, #32]
; CHECK-NEXT: stp q9, q8, [x8, #64]
-; CHECK-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT: ldp d11, d10, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT: ldp d13, d12, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT: ldp d15, d14, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: stp q31, q30, [x8, #96]
; CHECK-NEXT: stp q29, q28, [x8, #144]
; CHECK-NEXT: stp q27, q26, [x8, #176]
@@ -171,7 +165,7 @@ define dso_local void @run_test() local_unnamed_addr #0 {
; CHECK-NEXT: stp q4, q3, [x8, #432]
; CHECK-NEXT: stp q0, q2, [x8, #464]
; CHECK-NEXT: str q1, [x8, #496]
-; CHECK-NEXT: add sp, sp, #80 // =80
+; CHECK-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
br label %for.cond1.preheader
More information about the llvm-commits
mailing list