[PATCH] D99662: [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 12 00:45:09 PDT 2021

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SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.

Thanks, LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99662/new/

https://reviews.llvm.org/D99662

Previous message: [PATCH] D97292: [ARM] Add FP handling for MVE lane interleaving
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