[llvm] a36bb7f - [InstCombine] (X | Op01C) + Op1C --> X + (Op01C + Op1C) iff the or is actually an add

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2021-04-11T18:08:08+03:00
New Revision: a36bb7fd761942577b0d20d7f9b2bac57ffcd986

URL: https://github.com/llvm/llvm-project/commit/a36bb7fd761942577b0d20d7f9b2bac57ffcd986
DIFF: https://github.com/llvm/llvm-project/commit/a36bb7fd761942577b0d20d7f9b2bac57ffcd986.diff

LOG: [InstCombine] (X | Op01C) + Op1C --> X + (Op01C + Op1C) iff the or is actually an add

https://alive2.llvm.org/ce/z/Coc5yf

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    llvm/test/Transforms/InstCombine/add.ll
    llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 70caf2fdf83e..7bd7ddd79907 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -901,6 +901,12 @@ Instruction *InstCombinerImpl::foldAddWithConstant(BinaryOperator &Add) {
   if (!match(Op1, m_APInt(C)))
     return nullptr;
 
+  // (X | Op01C) + Op1C --> X + (Op01C + Op1C) iff the `or` is actually an `add`
+  Constant *Op01C;
+  if (match(Op0, m_Or(m_Value(X), m_ImmConstant(Op01C))) &&
+      haveNoCommonBitsSet(X, Op01C, DL, &AC, &Add, &DT))
+    return BinaryOperator::CreateAdd(X, ConstantExpr::getAdd(Op01C, Op1C));
+
   // (X | C2) + C --> (X | C2) ^ C2 iff (C2 == -C)
   const APInt *C2;
   if (match(Op0, m_Or(m_Value(), m_APInt(C2))) && *C2 == -*C)

diff  --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 223f033c1fd8..14647f957ccf 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -1358,8 +1358,7 @@ define i32 @lshr_add_use2_sexts(i1 %x, i1 %y, i32* %p) {
 define i8 @add_like_or_t0(i8 %x) {
 ; CHECK-LABEL: @add_like_or_t0(
 ; CHECK-NEXT:    [[I0:%.*]] = shl i8 [[X:%.*]], 4
-; CHECK-NEXT:    [[I1:%.*]] = or i8 [[I0]], 15
-; CHECK-NEXT:    [[R:%.*]] = add i8 [[I1]], 42
+; CHECK-NEXT:    [[R:%.*]] = add i8 [[I0]], 57
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %i0 = shl i8 %x, 4
@@ -1384,7 +1383,7 @@ define i8 @add_like_or_t2_extrause(i8 %x) {
 ; CHECK-NEXT:    [[I0:%.*]] = shl i8 [[X:%.*]], 4
 ; CHECK-NEXT:    [[I1:%.*]] = or i8 [[I0]], 15
 ; CHECK-NEXT:    call void @use(i8 [[I1]])
-; CHECK-NEXT:    [[R:%.*]] = add i8 [[I1]], 42
+; CHECK-NEXT:    [[R:%.*]] = add i8 [[I0]], 57
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %i0 = shl i8 %x, 4

diff  --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
index 64730a402b2f..34e8917fdece 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
@@ -1407,9 +1407,9 @@ define void @PR27626_5(i32 *%a, i32 %x, i32 %y, i32 %z, i64 %n) {
 ; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 3, i64 5, i64 7, i64 9>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
 ; CHECK-NEXT:    [[TMP4:%.*]] = shl i64 [[INDEX]], 1
 ; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = or i64 [[TMP4]], 3
-; CHECK-NEXT:    [[TMP5:%.*]] = add nuw nsw i64 [[OFFSET_IDX]], 2
+; CHECK-NEXT:    [[TMP5:%.*]] = or i64 [[TMP4]], 5
 ; CHECK-NEXT:    [[TMP6:%.*]] = or i64 [[TMP4]], 7
-; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 6
+; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[TMP4]], 9
 ; CHECK-NEXT:    [[TMP8:%.*]] = add <4 x i64> [[VEC_IND]], <i64 -1, i64 -1, i64 -1, i64 -1>
 ; CHECK-NEXT:    [[TMP9:%.*]] = add <4 x i64> [[VEC_IND]], <i64 -3, i64 -3, i64 -3, i64 -3>
 ; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[OFFSET_IDX]]