[PATCH] D100245: [ARM] Expand VMOVRRD simplification pattern
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 10 04:38:43 PDT 2021
dmgreen added inline comments.
================
Comment at: llvm/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll:47
; CHECK-NEXT: vmovl.u8 q8, d16
-; CHECK-NEXT: vmovl.u16 q8, d16
-; CHECK-NEXT: vmov r0, r1, d16
-; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: vmov.u16 r0, d16[0]
+; CHECK-NEXT: vmov.u16 r1, d16[1]
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This is a bit unfortunate, but if you run the code through opt it is already simplified to a single zext, which still becomes a vmovl; vmovl pair
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100245/new/
https://reviews.llvm.org/D100245
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