[PATCH] D100218: Fix for "Bug 49146 - Crash with MIPS16 multiply"

[Jesse D via Phabricator via llvm-commits]

jdeguire created this revision.
jdeguire added reviewers: atanasyan, RKSimon.
Herald added subscribers: jrtc27, hiraditya, arichardson, sdardis.
jdeguire requested review of this revision.
Herald added a project: LLVM.

This is a potential fix for a bug I reported here (Bug 49146) <https://bugs.llvm.org/show_bug.cgi?id=49146> in which a basic integer multiply instruction will crash Clang/LLVM when building for MIPS16. The test code I used is in the bug report. I manually verified the patch by examining the resulting disassembly from "llvm-objdump" to see the resulting "MULT->MFLO" instructions. I'm not sure if this patch should have been submitted to that bug report or here, so please let know me know if I'm in the wrong place.

(Note that there might be another minor bug in which a 3-bit "zero" field in the MIPS16 MFLO/MFHI is not set to zero, but I can look at that more closely and submit another patch later.)

The issue appeared to be that an "ISD::MUL" operation was being translated to a pseudo-instruction called "Mult16RxRyRz", but that pseudo-instruction was never translated to the real instruction sequence. Other operations that require the MIPS HI/LO registers are manually translated in the MIPS target-specific code and so this patch removes that pseudo-instruction and follows how the other HI/LO instructions are handled.

I'm not familiar with the LLVM review process and so any help with regards to documentation, providing tests, etc. would be appreciated.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100218

Files:
  llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
  llvm/lib/Target/Mips/Mips16InstrInfo.td
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/lib/Target/Mips/MipsISelLowering.h
  llvm/lib/Target/Mips/MipsInstrInfo.td
  llvm/lib/Target/Mips/MipsScheduleGeneric.td

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