[llvm] d8bc4de - [X86] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y),0) on non-BMI targets (PR44136)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 9 08:18:05 PDT 2021
Author: Simon Pilgrim
Date: 2021-04-09T16:11:11+01:00
New Revision: d8bc4de3cfe045cf393f6928e359a6f05deffd55
URL: https://github.com/llvm/llvm-project/commit/d8bc4de3cfe045cf393f6928e359a6f05deffd55
DIFF: https://github.com/llvm/llvm-project/commit/d8bc4de3cfe045cf393f6928e359a6f05deffd55.diff
LOG: [X86] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y),0) on non-BMI targets (PR44136)
Followup to D100177, enable the fold for non-BMI targets as well.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avx512-cmp.ll
llvm/test/CodeGen/X86/pr27202.ll
llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
llvm/test/CodeGen/X86/setcc-logic.ll
llvm/test/CodeGen/X86/switch-or.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 12f97372859b..321d4791029a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48165,7 +48165,7 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
// cmpeq(or(X,Y),X) --> cmpeq(and(~X,Y),0)
// cmpne(or(X,Y),X) --> cmpne(and(~X,Y),0)
- if (OpVT.isScalarInteger() && Subtarget.hasBMI()) {
+ if (OpVT.isScalarInteger()) {
auto MatchOrCmpEq = [&](SDValue N0, SDValue N1) {
if (N0.getOpcode() == ISD::OR && N0->hasOneUse()) {
if (N0.getOperand(0) == N1)
diff --git a/llvm/test/CodeGen/X86/avx512-cmp.ll b/llvm/test/CodeGen/X86/avx512-cmp.ll
index bd902dde2a26..e3d35129f554 100644
--- a/llvm/test/CodeGen/X86/avx512-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512-cmp.ll
@@ -155,13 +155,10 @@ B:
define i32 @test10(i64 %b, i64 %c, i1 %d) {
; ALL-LABEL: test10:
; ALL: ## %bb.0:
-; ALL-NEXT: movl %edx, %eax
-; ALL-NEXT: andb $1, %al
; ALL-NEXT: cmpq %rsi, %rdi
-; ALL-NEXT: sete %cl
-; ALL-NEXT: orb %dl, %cl
-; ALL-NEXT: andb $1, %cl
-; ALL-NEXT: cmpb %cl, %al
+; ALL-NEXT: sete %al
+; ALL-NEXT: notb %dl
+; ALL-NEXT: testb %al, %dl
; ALL-NEXT: je LBB8_1
; ALL-NEXT: ## %bb.2: ## %if.end.i
; ALL-NEXT: movl $6, %eax
diff --git a/llvm/test/CodeGen/X86/pr27202.ll b/llvm/test/CodeGen/X86/pr27202.ll
index f3b319ead598..2496a4bae258 100644
--- a/llvm/test/CodeGen/X86/pr27202.ll
+++ b/llvm/test/CodeGen/X86/pr27202.ll
@@ -33,8 +33,7 @@ define i1 @foo_pgso(i32 %i) !prof !14 {
define zeroext i1 @g(i32 %x) optsize {
; CHECK-LABEL: g:
; CHECK: # %bb.0:
-; CHECK-NEXT: orl $1, %edi
-; CHECK-NEXT: cmpl $1, %edi
+; CHECK-NEXT: testl $-2, %edi
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
%t0 = or i32 %x, 1
diff --git a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
index 69dada8a884e..3cc9120c9048 100644
--- a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
+++ b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
@@ -37,9 +37,7 @@ define i8* @SyFgets(i8* %line, i64 %length, i64 %fid) {
; CHECK-NEXT: .cfi_offset %r14, -32
; CHECK-NEXT: .cfi_offset %r15, -24
; CHECK-NEXT: .cfi_offset %rbp, -16
-; CHECK-NEXT: movq %rdx, %rax
-; CHECK-NEXT: orq $2, %rax
-; CHECK-NEXT: cmpq $2, %rax
+; CHECK-NEXT: testq $-3, %rdx
; CHECK-NEXT: jne LBB0_4
; CHECK-NEXT: ## %bb.1: ## %if.end
; CHECK-NEXT: xorl %eax, %eax
diff --git a/llvm/test/CodeGen/X86/setcc-logic.ll b/llvm/test/CodeGen/X86/setcc-logic.ll
index b32d625ab619..743d0c1e6c01 100644
--- a/llvm/test/CodeGen/X86/setcc-logic.ll
+++ b/llvm/test/CodeGen/X86/setcc-logic.ll
@@ -612,8 +612,8 @@ define i1 @and_icmps_const_1bit_
diff _common_op(i32 %x, i32 %y) {
define i1 @or_cmp_eq_i64(i64 %x, i64 %y) {
; NOBMI-LABEL: or_cmp_eq_i64:
; NOBMI: # %bb.0:
-; NOBMI-NEXT: orq %rdi, %rsi
-; NOBMI-NEXT: cmpq %rdi, %rsi
+; NOBMI-NEXT: notq %rdi
+; NOBMI-NEXT: testq %rsi, %rdi
; NOBMI-NEXT: sete %al
; NOBMI-NEXT: retq
;
@@ -630,8 +630,8 @@ define i1 @or_cmp_eq_i64(i64 %x, i64 %y) {
define i1 @or_cmp_ne_i32(i32 %x, i32 %y) {
; NOBMI-LABEL: or_cmp_ne_i32:
; NOBMI: # %bb.0:
-; NOBMI-NEXT: orl %esi, %edi
-; NOBMI-NEXT: cmpl %esi, %edi
+; NOBMI-NEXT: notl %esi
+; NOBMI-NEXT: testl %edi, %esi
; NOBMI-NEXT: setne %al
; NOBMI-NEXT: retq
;
@@ -646,38 +646,24 @@ define i1 @or_cmp_ne_i32(i32 %x, i32 %y) {
}
define i1 @or_cmp_eq_i16(i16 zeroext %x, i16 zeroext %y) {
-; NOBMI-LABEL: or_cmp_eq_i16:
-; NOBMI: # %bb.0:
-; NOBMI-NEXT: orl %edi, %esi
-; NOBMI-NEXT: cmpw %si, %di
-; NOBMI-NEXT: sete %al
-; NOBMI-NEXT: retq
-;
-; BMI-LABEL: or_cmp_eq_i16:
-; BMI: # %bb.0:
-; BMI-NEXT: notl %edi
-; BMI-NEXT: testw %si, %di
-; BMI-NEXT: sete %al
-; BMI-NEXT: retq
+; CHECK-LABEL: or_cmp_eq_i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: notl %edi
+; CHECK-NEXT: testw %si, %di
+; CHECK-NEXT: sete %al
+; CHECK-NEXT: retq
%o = or i16 %x, %y
%c = icmp eq i16 %x, %o
ret i1 %c
}
define i1 @or_cmp_ne_i8(i8 zeroext %x, i8 zeroext %y) {
-; NOBMI-LABEL: or_cmp_ne_i8:
-; NOBMI: # %bb.0:
-; NOBMI-NEXT: orl %esi, %edi
-; NOBMI-NEXT: cmpb %dil, %sil
-; NOBMI-NEXT: setne %al
-; NOBMI-NEXT: retq
-;
-; BMI-LABEL: or_cmp_ne_i8:
-; BMI: # %bb.0:
-; BMI-NEXT: notb %sil
-; BMI-NEXT: testb %dil, %sil
-; BMI-NEXT: setne %al
-; BMI-NEXT: retq
+; CHECK-LABEL: or_cmp_ne_i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: notb %sil
+; CHECK-NEXT: testb %dil, %sil
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: retq
%o = or i8 %x, %y
%c = icmp ne i8 %y, %o
ret i1 %c
diff --git a/llvm/test/CodeGen/X86/switch-or.ll b/llvm/test/CodeGen/X86/switch-or.ll
index c0501c315bcd..b0177e547ded 100644
--- a/llvm/test/CodeGen/X86/switch-or.ll
+++ b/llvm/test/CodeGen/X86/switch-or.ll
@@ -4,7 +4,6 @@
; CHECK-LABEL: test1
; CHECK: orl $2
; CHECK-NEXT: cmpl $6
-
define void @test1(i32 %variable) nounwind {
entry:
switch i32 %variable, label %if.end [
@@ -21,8 +20,7 @@ if.end:
}
; CHECK-LABEL: test2
-; CHECK: orl $-2147483648
-; CHECK-NEXT: cmpl $-2147483648
+; CHECK: testl $2147483647
define void @test2(i32 %variable) nounwind {
entry:
switch i32 %variable, label %if.end [
More information about the llvm-commits
mailing list