[PATCH] D99662: [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant

Andrew Savonichev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 9 07:21:31 PDT 2021


asavonic updated this revision to Diff 336446.
asavonic added a comment.

- Removed extra assert
- Removed arguments that can be queried from Root
- Removed assignments to RC and Opc
- Changed tests to ensure that basic blocks are not merged
- Added fp16 cases to arm64-fma-combines.ll


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99662/new/

https://reviews.llvm.org/D99662

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/arm64-fma-combines.ll
  llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir

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