[llvm] 68d62fe - [X86] Add zeroext attributes to i8/i16 and/or/xor overflow tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-04-09T15:01:10+01:00
New Revision: 68d62fe06859f0b3b681a01288ba0ee890227083

URL: https://github.com/llvm/llvm-project/commit/68d62fe06859f0b3b681a01288ba0ee890227083
DIFF: https://github.com/llvm/llvm-project/commit/68d62fe06859f0b3b681a01288ba0ee890227083.diff

LOG: [X86] Add zeroext attributes to i8/i16 and/or/xor overflow tests

Matches original c/c++ test cases

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/and-with-overflow.ll
    llvm/test/CodeGen/X86/or-with-overflow.ll
    llvm/test/CodeGen/X86/xor-with-overflow.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/and-with-overflow.ll b/llvm/test/CodeGen/X86/and-with-overflow.ll
index 9f7f45202e13..f197ae1f2995 100644
--- a/llvm/test/CodeGen/X86/and-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/and-with-overflow.ll
@@ -6,7 +6,7 @@
 ; PR48768 - 'and' clears the overflow flag, so we don't need a separate 'test'.
 ;
 
-define i8 @and_i8_ri(i8 %0, i8 %1) {
+define i8 @and_i8_ri(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: and_i8_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -32,7 +32,7 @@ define i8 @and_i8_ri(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i8 @and_i8_rr(i8 %0, i8 %1) {
+define i8 @and_i8_rr(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: and_i8_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -58,7 +58,7 @@ define i8 @and_i8_rr(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i16 @and_i16_ri(i16 %0, i16 %1) {
+define i16 @and_i16_ri(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: and_i16_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -86,7 +86,7 @@ define i16 @and_i16_ri(i16 %0, i16 %1) {
   ret i16 %5
 }
 
-define i16 @and_i16_rr(i16 %0, i16 %1) {
+define i16 @and_i16_rr(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: and_i16_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax

diff  --git a/llvm/test/CodeGen/X86/or-with-overflow.ll b/llvm/test/CodeGen/X86/or-with-overflow.ll
index adef53c0173b..f9a519383fb7 100644
--- a/llvm/test/CodeGen/X86/or-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/or-with-overflow.ll
@@ -6,7 +6,7 @@
 ; PR48768 - 'or' clears the overflow flag, so we don't need a separate 'test'.
 ;
 
-define i8 @or_i8_ri(i8 %0, i8 %1) {
+define i8 @or_i8_ri(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: or_i8_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -32,7 +32,7 @@ define i8 @or_i8_ri(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i8 @or_i8_rr(i8 %0, i8 %1) {
+define i8 @or_i8_rr(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: or_i8_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -58,7 +58,7 @@ define i8 @or_i8_rr(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i16 @or_i16_ri(i16 %0, i16 %1) {
+define i16 @or_i16_ri(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: or_i16_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -86,7 +86,7 @@ define i16 @or_i16_ri(i16 %0, i16 %1) {
   ret i16 %5
 }
 
-define i16 @or_i16_rr(i16 %0, i16 %1) {
+define i16 @or_i16_rr(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: or_i16_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax

diff  --git a/llvm/test/CodeGen/X86/xor-with-overflow.ll b/llvm/test/CodeGen/X86/xor-with-overflow.ll
index 6054c9adf5f5..cb48aa259c91 100644
--- a/llvm/test/CodeGen/X86/xor-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/xor-with-overflow.ll
@@ -6,7 +6,7 @@
 ; PR48768 - 'xor' clears the overflow flag, so we don't need a separate 'test'.
 ;
 
-define i8 @xor_i8_ri(i8 %0, i8 %1) {
+define i8 @xor_i8_ri(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: xor_i8_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -32,7 +32,7 @@ define i8 @xor_i8_ri(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i8 @xor_i8_rr(i8 %0, i8 %1) {
+define i8 @xor_i8_rr(i8 zeroext %0, i8 zeroext %1) {
 ; X86-LABEL: xor_i8_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
@@ -58,7 +58,7 @@ define i8 @xor_i8_rr(i8 %0, i8 %1) {
   ret i8 %5
 }
 
-define i16 @xor_i16_ri(i16 %0, i16 %1) {
+define i16 @xor_i16_ri(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: xor_i16_ri:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -86,7 +86,7 @@ define i16 @xor_i16_ri(i16 %0, i16 %1) {
   ret i16 %5
 }
 
-define i16 @xor_i16_rr(i16 %0, i16 %1) {
+define i16 @xor_i16_rr(i16 zeroext %0, i16 zeroext %1) {
 ; X86-LABEL: xor_i16_rr:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax