[PATCH] D100018: [WebAssembly] Add shuffles as an option for lowering BUILD_VECTOR

Heejin Ahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 9 06:10:43 PDT 2021


aheejin accepted this revision.
aheejin added inline comments.


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Comment at: llvm/test/CodeGen/WebAssembly/simd-concat.ll:75
+; CHECK-NEXT:    local.get 1
+; CHECK-NEXT:    i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 16, 17, 18, 19, 24, 25, 26, 27
+; CHECK-NEXT:    # fallthrough-return
----------------
tlively wrote:
> aheejin wrote:
> > I might be mistaken, but isn't this loss of data? v2i32 is a full 128bits vector and the result of `shufflevector` contain the whole two vectors but the result of `i8x16.shuffle` contains only half of it.
> v2i32 is only 64 bits, but it is represented in Wasm using the low 32 bits of each lane in an i64x2 vector. The i8x16.shuffle here pulls in those low 32 bits from each lane and leaves the unused high 32 bits.
Ah right, I mistook this for `v4i32`.. Sorry.


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  https://reviews.llvm.org/D100018/new/

https://reviews.llvm.org/D100018



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