[llvm] 36138db - [AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
Sebastian Neubauer via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 9 02:22:17 PDT 2021
Author: Sebastian Neubauer
Date: 2021-04-09T11:20:31+02:00
New Revision: 36138db116a8eb05b801fa02ee52ab1436c5a3ac
URL: https://github.com/llvm/llvm-project/commit/36138db116a8eb05b801fa02ee52ab1436c5a3ac
DIFF: https://github.com/llvm/llvm-project/commit/36138db116a8eb05b801fa02ee52ab1436c5a3ac.diff
LOG: [AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
Remove 'Is' from IsFlatScratch/Global. NFC
Differential Revision: https://reviews.llvm.org/D100108
Added:
Modified:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/FLATInstructions.td
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIInstrFormats.td
llvm/lib/Target/AMDGPU/SIInstrInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index ef17b64278c9..3b5a09cfd5b3 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -3824,7 +3824,7 @@ bool AMDGPUAsmParser::validateFlatOffset(const MCInst &Inst,
// For FLAT segment the offset must be positive;
// MSB is ignored and forced to zero.
- if (TSFlags & (SIInstrFlags::IsFlatGlobal | SIInstrFlags::IsFlatScratch)) {
+ if (TSFlags & (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch)) {
unsigned OffsetSize = AMDGPU::getNumFlatOffsetBits(getSTI(), true);
if (!isIntN(OffsetSize, Op.getImm())) {
Error(getFlatOffsetLoc(Operands),
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td
index 2a19106428c3..18ce51aa5427 100644
--- a/llvm/lib/Target/AMDGPU/FLATInstructions.td
+++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td
@@ -69,9 +69,9 @@ class FLAT_Pseudo<string opName, dag outs, dag ins,
let VM_CNT = 1;
let LGKM_CNT = !not(!or(is_flat_global, is_flat_scratch));
- let IsFlatGlobal = is_flat_global;
+ let FlatGlobal = is_flat_global;
- let IsFlatScratch = is_flat_scratch;
+ let FlatScratch = is_flat_scratch;
}
class FLAT_Real <bits<7> op, FLAT_Pseudo ps> :
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 31aedb6ccbbc..b3e127670a51 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -147,7 +147,7 @@ void AMDGPUInstPrinter::printFlatOffset(const MCInst *MI, unsigned OpNo,
const MCInstrDesc &Desc = MII.get(MI->getOpcode());
bool IsFlatSeg = !(Desc.TSFlags &
- (SIInstrFlags::IsFlatGlobal | SIInstrFlags::IsFlatScratch));
+ (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch));
if (IsFlatSeg) { // Unsigned offset
printU16ImmDecOperand(MI, OpNo, O);
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index b6abfdf53efc..d3c0d792804d 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -91,7 +91,7 @@ enum : uint64_t {
D16Buf = UINT64_C(1) << 50,
// FLAT instruction accesses FLAT_GLBL segment.
- IsFlatGlobal = UINT64_C(1) << 51,
+ FlatGlobal = UINT64_C(1) << 51,
// Uses floating point double precision rounding mode
FPDPRounding = UINT64_C(1) << 52,
@@ -106,7 +106,7 @@ enum : uint64_t {
IsDOT = UINT64_C(1) << 55,
// FLAT instruction accesses FLAT_SCRATCH segment.
- IsFlatScratch = UINT64_C(1) << 56,
+ FlatScratch = UINT64_C(1) << 56,
// Atomic without return.
IsAtomicNoRet = UINT64_C(1) << 57,
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
index df3571e86006..e39f52875f1f 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
@@ -113,7 +113,7 @@ class InstSI <dag outs, dag ins, string asm = "",
// This field indicates that FLAT instruction accesses FLAT_GLBL segment.
// Must be 0 for non-FLAT instructions.
- field bit IsFlatGlobal = 0;
+ field bit FlatGlobal = 0;
// Reads the mode register, usually for FP environment.
field bit ReadsModeReg = 0;
@@ -133,7 +133,7 @@ class InstSI <dag outs, dag ins, string asm = "",
// This field indicates that FLAT instruction accesses FLAT_SCRATCH segment.
// Must be 0 for non-FLAT instructions.
- field bit IsFlatScratch = 0;
+ field bit FlatScratch = 0;
// Atomic without a return.
field bit IsAtomicNoRet = 0;
@@ -199,7 +199,7 @@ class InstSI <dag outs, dag ins, string asm = "",
let TSFlags{50} = D16Buf;
- let TSFlags{51} = IsFlatGlobal;
+ let TSFlags{51} = FlatGlobal;
let TSFlags{52} = FPDPRounding;
@@ -209,7 +209,7 @@ class InstSI <dag outs, dag ins, string asm = "",
let TSFlags{55} = IsDOT;
- let TSFlags{56} = IsFlatScratch;
+ let TSFlags{56} = FlatScratch;
let TSFlags{57} = IsAtomicNoRet;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index b5a597c975c4..6044d6ffcbf0 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -506,28 +506,28 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
// i.e. global_* or scratch_*.
static bool isSegmentSpecificFLAT(const MachineInstr &MI) {
auto Flags = MI.getDesc().TSFlags;
- return Flags & (SIInstrFlags::IsFlatGlobal | SIInstrFlags::IsFlatScratch);
+ return Flags & (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch);
}
bool isSegmentSpecificFLAT(uint16_t Opcode) const {
auto Flags = get(Opcode).TSFlags;
- return Flags & (SIInstrFlags::IsFlatGlobal | SIInstrFlags::IsFlatScratch);
+ return Flags & (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch);
}
static bool isFLATGlobal(const MachineInstr &MI) {
- return MI.getDesc().TSFlags & SIInstrFlags::IsFlatGlobal;
+ return MI.getDesc().TSFlags & SIInstrFlags::FlatGlobal;
}
bool isFLATGlobal(uint16_t Opcode) const {
- return get(Opcode).TSFlags & SIInstrFlags::IsFlatGlobal;
+ return get(Opcode).TSFlags & SIInstrFlags::FlatGlobal;
}
static bool isFLATScratch(const MachineInstr &MI) {
- return MI.getDesc().TSFlags & SIInstrFlags::IsFlatScratch;
+ return MI.getDesc().TSFlags & SIInstrFlags::FlatScratch;
}
bool isFLATScratch(uint16_t Opcode) const {
- return get(Opcode).TSFlags & SIInstrFlags::IsFlatScratch;
+ return get(Opcode).TSFlags & SIInstrFlags::FlatScratch;
}
// Any FLAT encoded instruction, including global_* and scratch_*.
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