[PATCH] D100167: [AIX] Adjust CSR order to avoid breaking ABI regarding traceback

[Kai Luo via Phabricator via llvm-commits]

lkail created this revision.
lkail added reviewers: jsji, nemanjai, PowerPC.
Herald added subscribers: kbarton, hiraditya.
lkail requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Allocate non-volatile registers in order to be compatible with ABI, regarding gpr_save.

Quoted from https://www.ibm.com/docs/en/ssw_aix_72/assembler/assembler_pdf.pdf page55,

> The preferred method of using GPRs is to use the volatile registers first. Next, use the nonvolatile registers

in descending order, starting with GPR31.

We now make allocation order aligned to what the reference recommends.

This patch is based on @jsji 
's initial draft.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100167

Files:
  llvm/lib/Target/PowerPC/PPCRegisterInfo.td
  llvm/test/CodeGen/PowerPC/aix-32-csr-alloc.ll
  llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
  llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll
  llvm/test/CodeGen/PowerPC/aix-csr-alloc.ll
  llvm/test/CodeGen/PowerPC/inc-of-add.ll

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