[PATCH] D100166: [PowerPC] stop reverse mem op generation when the feeder has more than one users

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 9 00:48:27 PDT 2021


shchenz created this revision.
shchenz added reviewers: nemanjai, jsji, stefanp, PowerPC.
Herald added subscribers: kbarton, hiraditya.
shchenz requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

We should consider the feeder user number when we do reverse memory operation transformation. Otherwise, we may get negative impact.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100166

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/vsx-shuffle-le-multiple-uses.ll


Index: llvm/test/CodeGen/PowerPC/vsx-shuffle-le-multiple-uses.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/vsx-shuffle-le-multiple-uses.ll
+++ llvm/test/CodeGen/PowerPC/vsx-shuffle-le-multiple-uses.ll
@@ -7,8 +7,8 @@
 ; CHECK-LABEL: loadHasMultipleUses:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    lxv 0, 0(3)
+; CHECK-NEXT:    xxswapd 34, 0
 ; CHECK-NEXT:    stxv 0, 0(4)
-; CHECK-NEXT:    lxvd2x 34, 0, 3
 ; CHECK-NEXT:    blr
   %v1 = load <2 x double>, <2 x double>* %p1
   store <2 x double> %v1, <2 x double>* %p2, align 16
@@ -19,10 +19,8 @@
 define <2 x double> @storeHasMultipleUses(<2 x double> %v, <2 x double>* %p) {
 ; CHECK-LABEL: storeHasMultipleUses:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xxswapd 0, 34
-; CHECK-NEXT:    addi 3, 5, 256
-; CHECK-NEXT:    stxvd2x 34, 0, 3
-; CHECK-NEXT:    xxlor 34, 0, 0
+; CHECK-NEXT:    xxswapd 34, 34
+; CHECK-NEXT:    stxv 34, 256(5)
 ; CHECK-NEXT:    blr
   %v1 = shufflevector <2 x double> %v, <2 x double> %v, <2 x i32> < i32 1, i32 0>
   %addr = getelementptr inbounds <2 x double>, <2 x double>* %p, i64 16
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -14357,6 +14357,11 @@
     return SDValue();
 
   if (LSBase->getOpcode() == ISD::LOAD) {
+    // If the load has more than one user except the shufflevector instruction,
+    // it is not profitable to replace the shufflevector with a reverse load.
+    if (!LSBase->hasOneUse())
+      return SDValue();
+
     SDLoc dl(SVN);
     SDValue LoadOps[] = {LSBase->getChain(), LSBase->getBasePtr()};
     return DAG.getMemIntrinsicNode(
@@ -14365,6 +14370,12 @@
   }
 
   if (LSBase->getOpcode() == ISD::STORE) {
+    // If the shufflevector instruction has more than one user except the store
+    // instruction, it is not profitable to replace it with a reverse store as
+    // the reverse store has no DForm.
+    if (!SVN->hasOneUse())
+      return SDValue();
+
     SDLoc dl(LSBase);
     SDValue StoreOps[] = {LSBase->getChain(), SVN->getOperand(0),
                           LSBase->getBasePtr()};


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D100166.336331.patch
Type: text/x-patch
Size: 2249 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210409/1e661878/attachment.bin>


More information about the llvm-commits mailing list