[llvm] 4fae63c - AMDGPU: Add gfx90c support to code object v2 for backwards compatibility

[Konstantin Zhuravlyov via llvm-commits]

Author: Konstantin Zhuravlyov
Date: 2021-04-08T16:42:43-04:00
New Revision: 4fae63c612a7b6c4a777224f53edddb9c9c0b810

URL: https://github.com/llvm/llvm-project/commit/4fae63c612a7b6c4a777224f53edddb9c9c0b810
DIFF: https://github.com/llvm/llvm-project/commit/4fae63c612a7b6c4a777224f53edddb9c9c0b810.diff

LOG: AMDGPU: Add gfx90c support to code object v2 for backwards compatibility

Differential Revision: https://reviews.llvm.org/D100126

Added: 
    llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll

Modified: 
    llvm/docs/AMDGPUUsage.rst
    llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 27c8791d889bf..04f35747745c0 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -1360,34 +1360,35 @@ are deprecated and should not be used.
   .. table:: AMDGPU Code Object V2 Supported Processors and Fixed Target Feature Settings
      :name: amdgpu-elf-note-record-supported_processors-v2-table
 
-     ==================== ==========================
-     Note Record ISA Name Target ID
-     ==================== ==========================
-     ``AMD:AMDGPU:6:0:0`` ``gfx600``
-     ``AMD:AMDGPU:6:0:1`` ``gfx601``
-     ``AMD:AMDGPU:6:0:2`` ``gfx602``
-     ``AMD:AMDGPU:7:0:0`` ``gfx700``
-     ``AMD:AMDGPU:7:0:1`` ``gfx701``
-     ``AMD:AMDGPU:7:0:2`` ``gfx702``
-     ``AMD:AMDGPU:7:0:3`` ``gfx703``
-     ``AMD:AMDGPU:7:0:4`` ``gfx704``
-     ``AMD:AMDGPU:7:0:5`` ``gfx705``
-     ``AMD:AMDGPU:8:0:0`` ``gfx802``
-     ``AMD:AMDGPU:8:0:1`` ``gfx801:xnack+``
-     ``AMD:AMDGPU:8:0:2`` ``gfx802``
-     ``AMD:AMDGPU:8:0:3`` ``gfx803``
-     ``AMD:AMDGPU:8:0:4`` ``gfx803``
-     ``AMD:AMDGPU:8:0:5`` ``gfx805``
-     ``AMD:AMDGPU:8:1:0`` ``gfx810:xnack+``
-     ``AMD:AMDGPU:9:0:0`` ``gfx900:xnack-``
-     ``AMD:AMDGPU:9:0:1`` ``gfx900:xnack+``
-     ``AMD:AMDGPU:9:0:2`` ``gfx902:xnack-``
-     ``AMD:AMDGPU:9:0:3`` ``gfx902:xnack+``
-     ``AMD:AMDGPU:9:0:4`` ``gfx904:xnack-``
-     ``AMD:AMDGPU:9:0:5`` ``gfx904:xnack+``
-     ``AMD:AMDGPU:9:0:6`` ``gfx906:sramecc-:xnack-``
-     ``AMD:AMDGPU:9:0:7`` ``gfx906:sramecc-:xnack+``
-     ==================== ==========================
+     ===================== ==========================
+     Note Record ISA Name  Target ID
+     ===================== ==========================
+     ``AMD:AMDGPU:6:0:0``  ``gfx600``
+     ``AMD:AMDGPU:6:0:1``  ``gfx601``
+     ``AMD:AMDGPU:6:0:2``  ``gfx602``
+     ``AMD:AMDGPU:7:0:0``  ``gfx700``
+     ``AMD:AMDGPU:7:0:1``  ``gfx701``
+     ``AMD:AMDGPU:7:0:2``  ``gfx702``
+     ``AMD:AMDGPU:7:0:3``  ``gfx703``
+     ``AMD:AMDGPU:7:0:4``  ``gfx704``
+     ``AMD:AMDGPU:7:0:5``  ``gfx705``
+     ``AMD:AMDGPU:8:0:0``  ``gfx802``
+     ``AMD:AMDGPU:8:0:1``  ``gfx801:xnack+``
+     ``AMD:AMDGPU:8:0:2``  ``gfx802``
+     ``AMD:AMDGPU:8:0:3``  ``gfx803``
+     ``AMD:AMDGPU:8:0:4``  ``gfx803``
+     ``AMD:AMDGPU:8:0:5``  ``gfx805``
+     ``AMD:AMDGPU:8:1:0``  ``gfx810:xnack+``
+     ``AMD:AMDGPU:9:0:0``  ``gfx900:xnack-``
+     ``AMD:AMDGPU:9:0:1``  ``gfx900:xnack+``
+     ``AMD:AMDGPU:9:0:2``  ``gfx902:xnack-``
+     ``AMD:AMDGPU:9:0:3``  ``gfx902:xnack+``
+     ``AMD:AMDGPU:9:0:4``  ``gfx904:xnack-``
+     ``AMD:AMDGPU:9:0:5``  ``gfx904:xnack+``
+     ``AMD:AMDGPU:9:0:6``  ``gfx906:sramecc-:xnack-``
+     ``AMD:AMDGPU:9:0:7``  ``gfx906:sramecc-:xnack+``
+     ``AMD:AMDGPU:9:0:12`` ``gfx90c:xnack-``
+     ===================== ==========================
 
 .. _amdgpu-note-records-v3-v4:
 

diff  --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index 4a6b90b8d4aec..9251c5f4242b9 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -438,6 +438,11 @@ std::string AMDGPUTargetID::toString() const {
       } else if (Processor == "gfx906") {
         if (isXnackOnOrAny())
           Processor = "gfx907";
+      } else if (Processor == "gfx90c") {
+        if (isXnackOnOrAny())
+          report_fatal_error(
+              "AMD GPU code object V2 does not support processor " + Processor +
+              " with XNACK being ON or ANY");
       } else {
         report_fatal_error(
             "AMD GPU code object V2 does not support processor " + Processor);

diff  --git a/llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll b/llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll
new file mode 100644
index 0000000000000..e8654f2efb6d1
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll
@@ -0,0 +1,6 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90c -mattr=-xnack --amdhsa-code-object-version=2 < %s 2>&1 | FileCheck --check-prefix=GFX90C-VALID %s
+; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90c --amdhsa-code-object-version=2 < %s 2>&1 | FileCheck --check-prefix=GFX90C-ERROR %s
+
+; GFX90C-VALID: .hsa_code_object_isa 9,0,12,"AMD","AMDGPU"
+; GFX90C-VALID: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx90c"
+; GFX90C-ERROR: LLVM ERROR: AMD GPU code object V2 does not support processor gfx90c with XNACK being ON or ANY