[PATCH] D100123: [AMDGPU] Add TransVALU to gfx10

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

I have no objection to this as a first step in the right direction, but I think it should have no effect at all at the moment. The schedmodel already knows that we can only issue one instruction per cycle, and this patch does not affect that. It only becomes interesting when you model the fact that issuing a trans instruction consumes the trans ALU for (say) 4 cycles, so that on the following 3 cycles you could issue a normal VALU instruction but *not* another trans instruction.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100123/new/

https://reviews.llvm.org/D100123