[llvm] b8cd668 - [NFC][RISCV] Add test for scalable offset under large stack size.

[Hsiangkai Wang via llvm-commits]

Author: Hsiangkai Wang
Date: 2021-04-08T14:46:05+08:00
New Revision: b8cd6681156a533dd6d4b3f0f5a1acf1116bc347

URL: https://github.com/llvm/llvm-project/commit/b8cd6681156a533dd6d4b3f0f5a1acf1116bc347
DIFF: https://github.com/llvm/llvm-project/commit/b8cd6681156a533dd6d4b3f0f5a1acf1116bc347.diff

LOG: [NFC][RISCV] Add test for scalable offset under large stack size.

This test case shows that we access wrong stack slots when the frame
object has scalable offset under large stack size.

Differential Revision: https://reviews.llvm.org/D100084

Added: 
    llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir b/llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
new file mode 100644
index 000000000000..7b017e7c9388
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
@@ -0,0 +1,61 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=riscv64 -stop-after=prologepilog %s -o - 2>&1 | FileCheck %s
+
+--- |
+  define void @add_scalable_offset(
+            <vscale x 1 x i64> *%pa,
+            i64 %vl)
+  {
+    ret void
+  }
+...
+---
+name: add_scalable_offset
+tracksRegLiveness: true
+frameInfo:
+  isFrameAddressTaken: true
+  stackSize:       2240
+stack:
+  - { id: 0, type: default, offset: 0, size: 1120, alignment: 4,
+      stack-id: default }
+  - { id: 1, type: default, offset: 1120, size: 1120, alignment: 4,
+      stack-id: default }
+  - { id: 2, offset: 0, size: 8, alignment: 8, stack-id: scalable-vector }
+body: |
+  bb.0:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: add_scalable_offset
+    ; CHECK: liveins: $x10, $x11, $x1
+    ; CHECK: $x2 = frame-setup ADDI $x2, -2032
+    ; CHECK: CFI_INSTRUCTION def_cfa_offset 2032
+    ; CHECK: SD killed $x1, $x2, 2024 :: (store 8 into %stack.3)
+    ; CHECK: SD killed $x8, $x2, 2016 :: (store 8 into %stack.4)
+    ; CHECK: CFI_INSTRUCTION offset $x1, -8
+    ; CHECK: CFI_INSTRUCTION offset $x8, -16
+    ; CHECK: $x8 = frame-setup ADDI $x2, 2032
+    ; CHECK: CFI_INSTRUCTION def_cfa $x8, 0
+    ; CHECK: $x2 = frame-setup ADDI $x2, -240
+    ; CHECK: $x12 = PseudoReadVLENB
+    ; CHECK: $x2 = SUB $x2, killed $x12
+    ; CHECK: dead renamable $x11 = PseudoVSETVLI killed renamable $x11, 88, implicit-def $vl, implicit-def $vtype
+    ; CHECK: renamable $v25 = PseudoVLE64_V_M1 killed renamable $x10, $noreg, 64, implicit $vl, implicit $vtype :: (load unknown-size from %ir.pa, align 8)
+    ; CHECK: $x10 = LUI 1048575
+    ; CHECK: $x10 = ADDIW killed $x10, 1824
+    ; CHECK: $x10 = ADD $x8, killed $x10
+    ; CHECK: VS1R_V killed renamable $v25, killed renamable $x10
+    ; CHECK: $x10 = PseudoReadVLENB
+    ; CHECK: $x2 = ADD $x2, killed $x10
+    ; CHECK: $x2 = frame-destroy ADDI $x2, 240
+    ; CHECK: $x8 = LD $x2, 2016 :: (load 8 from %stack.4)
+    ; CHECK: $x1 = LD $x2, 2024 :: (load 8 from %stack.3)
+    ; CHECK: $x2 = frame-destroy ADDI $x2, 2032
+    ; CHECK: PseudoRET
+    %1:gpr = COPY $x11
+    %0:gpr = COPY $x10
+    %2:vr = PseudoVLE64_V_M1 %0, %1, 64, implicit $vl, implicit $vtype :: (load unknown-size from %ir.pa, align 8)
+    %3:gpr = ADDI %stack.2, 0
+    VS1R_V killed %2:vr, %3:gpr
+    PseudoRET
+
+...