[PATCH] D100085: [X86] Support -march=rocketlake

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 7 22:00:13 PDT 2021


craig.topper added inline comments.


================
Comment at: compiler-rt/lib/builtins/cpu_model.c:101
   INTEL_COREI7_ALDERLAKE,
+  INTEL_COREI7_ROCKETLAKE,
   AMDFAM19H_ZNVER3,
----------------
This order is defined by libgcc. We can't insert in the middle unless ZNVER3 was in the wrong place

Why this not referenced in the switch the select subtype?


================
Comment at: llvm/lib/Target/X86/X86.td:767
+  // Rocketlake
+  list<SubtargetFeature> RKLAdditionalFeatures = [FeatureAES,
+                                                  FeatureXSAVEC,
----------------
Is this list this long because SKL includes SGX but RKL doesn't?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100085/new/

https://reviews.llvm.org/D100085



More information about the llvm-commits mailing list