[PATCH] D100083: [RISCV] Add InstAlias for Zbb Zbp and Zbs extension

[LevyHsu via Phabricator via llvm-commits]

LevyHsu created this revision.
LevyHsu added reviewers: craig.topper, jrtc27, kito-cheng, asb.
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Add InstAlias that allows the last operand to be an imm for following instructions:

1. Zbb or Zbp:
  - ror
  - rorw (RV64 Only)

2. Zbs
  - best
  - bclr
  - binv
  - bext


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100083

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/test/MC/RISCV/rv32b-aliases-valid.s
  llvm/test/MC/RISCV/rv64b-aliases-valid.s


Index: llvm/test/MC/RISCV/rv64b-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64b-aliases-valid.s
+++ llvm/test/MC/RISCV/rv64b-aliases-valid.s
@@ -314,3 +314,27 @@
 # CHECK-S-OBJ-NOALIAS: gorci t0, t1, 63
 # CHECK-S-OBJ: orc t0, t1
 orc x5, x6
+
+# CHECK-S-OBJ-NOALIAS: rori t0, t1, 8
+# CHECK-S-OBJ: ror t0, t1, 8
+ror x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: roriw t0, t1, 8
+# CHECK-S-OBJ: rorw t0, t1, 8
+rorw x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bseti t0, t1, 8
+# CHECK-S-OBJ: bset t0, t1, 8
+bset x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bclri t0, t1, 8
+# CHECK-S-OBJ: bclr t0, t1, 8
+bclr x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: binvi t0, t1, 8
+# CHECK-S-OBJ: binv t0, t1, 8
+binv x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bexti t0, t1, 8
+# CHECK-S-OBJ: bext t0, t1, 8
+bext x5, x6, 8
Index: llvm/test/MC/RISCV/rv32b-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32b-aliases-valid.s
+++ llvm/test/MC/RISCV/rv32b-aliases-valid.s
@@ -222,3 +222,23 @@
 # CHECK-S-OBJ-NOALIAS: gorci t0, t1, 31
 # CHECK-S-OBJ: orc t0, t1
 orc x5, x6
+
+# CHECK-S-OBJ-NOALIAS: rori t0, t1, 8
+# CHECK-S-OBJ: ror t0, t1, 8
+ror x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bseti t0, t1, 8
+# CHECK-S-OBJ: bset t0, t1, 8
+bset x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bclri t0, t1, 8
+# CHECK-S-OBJ: bclr t0, t1, 8
+bclr x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: binvi t0, t1, 8
+# CHECK-S-OBJ: binv t0, t1, 8
+binv x5, x6, 8
+
+# CHECK-S-OBJ-NOALIAS: bexti t0, t1, 8
+# CHECK-S-OBJ: bext t0, t1, 8
+bext x5, x6, 8
Index: llvm/lib/Target/RISCV/RISCVInstrInfoB.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -633,6 +633,27 @@
 def : InstAlias<"orc $rd, $rs",     (GORCI GPR:$rd, GPR:$rs, 0b111111)>;
 } // Predicates = [HasStdExtZbp, IsRV64]
 
+let Predicates = [HasStdExtZbbOrZbp] in {
+def : InstAlias<"ror $rd, $rs1, $shamt",
+                (RORI  GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+} // Predicates = [HasStdExtZbbOrZbp]
+
+let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
+def : InstAlias<"rorw $rd, $rs1, $shamt",
+                (RORIW  GPR:$rd, GPR:$rs1, uimm5:$shamt), 0>;
+} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
+
+let Predicates = [HasStdExtZbs] in {
+def : InstAlias<"bset $rd, $rs1, $shamt",
+                (BSETI  GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+def : InstAlias<"bclr $rd, $rs1, $shamt",
+                (BCLRI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+def : InstAlias<"binv $rd, $rs1, $shamt",
+                (BINVI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+def : InstAlias<"bext $rd, $rs1, $shamt",
+                (BEXTI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+} // Predicates = [HasStdExtZbs]
+
 //===----------------------------------------------------------------------===//
 // Compressed Instruction patterns
 //===----------------------------------------------------------------------===//


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