[llvm] 2e9465c - [NFC][AMDGPU] Correct indentation in AMDGPUUsage.rst

Tony Tye via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 7 18:00:58 PDT 2021


Author: Tony Tye
Date: 2021-04-08T01:00:13Z
New Revision: 2e9465ce2ef6fb7be13d25024f95118642097be1

URL: https://github.com/llvm/llvm-project/commit/2e9465ce2ef6fb7be13d25024f95118642097be1
DIFF: https://github.com/llvm/llvm-project/commit/2e9465ce2ef6fb7be13d25024f95118642097be1.diff

LOG: [NFC][AMDGPU] Correct indentation in AMDGPUUsage.rst

Correct indentation that results in rST syntax error.

Added: 
    

Modified: 
    llvm/docs/AMDGPUUsage.rst

Removed: 
    


################################################################################
diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index f1f618b94975..27c8791d889b 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -6045,8 +6045,7 @@ For GFX90A:
       the cache probe caused by coherent requests. Coherent requests are caused
       by GPU accesses to pages with the PTE C-bit set, by CPU accesses over
       XGMI, and by PCIe requests that are configured to be coherent requests.
-
-      * XGMI accesses from the CPU to local memory may be cached on the CPU.
+    * XGMI accesses from the CPU to local memory may be cached on the CPU.
       Subsequent access from the GPU will automatically invalidate or writeback
       the CPU cache due to the L2 probe filter and and the PTE C-bit being set.
     * Since all work-groups on the same agent share the same L2, no L2


        


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