[PATCH] D98936: [RISCV] DAG nodes and pseudo instructions for CSR access

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:31
                                          SDTCisVT<3, OtherVT>]>;
+def SDT_ReadCSR  : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>]>;
+def SDT_WriteCSR : SDTypeProfile<0, 2, [SDTCisInt<0>, SDTCisInt<1>]>;
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I think this should be SDT_RISCVReadCSR to following the convention established by the others.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1134
+           [(set GPR:$rd, (riscv_read_csr (XLenVT SR.Encoding)))]>,
+    PseudoInstExpansion<(CSRRC GPR:$rd, SR.Encoding, X0)> {
+  let hasSideEffects = 0;
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Should this be CSRRS to match the CSRR pseudo instruction definiton?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98936/new/

https://reviews.llvm.org/D98936