[llvm] ce9cca6 - [AMDGPU] SIFoldOperands: rename tryFoldInst to tryFoldCndMask

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-04-06T15:23:58+01:00
New Revision: ce9cca6c3a31998b924ac9c67d8e1c70ada5665b

URL: https://github.com/llvm/llvm-project/commit/ce9cca6c3a31998b924ac9c67d8e1c70ada5665b
DIFF: https://github.com/llvm/llvm-project/commit/ce9cca6c3a31998b924ac9c67d8e1c70ada5665b.diff

LOG: [AMDGPU] SIFoldOperands: rename tryFoldInst to tryFoldCndMask

This follows the pattern of the other tryFold* functions. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index fc61baa6f298..3acc55e737d1 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1158,8 +1158,8 @@ static bool tryConstantFoldOp(MachineRegisterInfo &MRI,
 }
 
 // Try to fold an instruction into a simpler one
-static bool tryFoldInst(const SIInstrInfo *TII,
-                        MachineInstr *MI) {
+static bool tryFoldCndMask(const SIInstrInfo *TII,
+                           MachineInstr *MI) {
   unsigned Opc = MI->getOpcode();
 
   if (Opc == AMDGPU::V_CNDMASK_B32_e32    ||
@@ -1313,7 +1313,7 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
       LLVM_DEBUG(dbgs() << "Folded source from " << MI << " into OpNo "
                         << static_cast<int>(Fold.UseOpNo) << " of "
                         << *Fold.UseMI << '\n');
-      if (tryFoldInst(TII, Fold.UseMI))
+      if (tryFoldCndMask(TII, Fold.UseMI))
         Folded.insert(Fold.UseMI);
     } else if (Fold.isCommuted()) {
       // Restoring instruction's original operand order if fold has failed.
@@ -1755,7 +1755,7 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
       Next = std::next(I);
       MachineInstr &MI = *I;
 
-      tryFoldInst(TII, &MI);
+      tryFoldCndMask(TII, &MI);
 
       if (MI.isRegSequence() && tryFoldRegSequence(MI))
         continue;