[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim Lin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 5 23:54:19 PDT 2021


Jim updated this revision to Diff 335415.
Jim added a comment.

Merge https://reviews.llvm.org/D95589 and https://reviews.llvm.org/D95590 into this patch.

Implement P's sub-extensions Zpn, Zpsfoperand and Zprvsfextra.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95588/new/

https://reviews.llvm.org/D95588

Files:
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Basic/Targets/RISCV.h
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  clang/test/Preprocessor/riscv-target-features.c
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoP.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/MC/RISCV/rvp/non-simd.s
  llvm/test/MC/RISCV/rvp/partial-simd.s
  llvm/test/MC/RISCV/rvp/rv32p-invalid.s
  llvm/test/MC/RISCV/rvp/rv32zpsfoperand.s
  llvm/test/MC/RISCV/rvp/rv64p-invalid.s
  llvm/test/MC/RISCV/rvp/rv64p.s
  llvm/test/MC/RISCV/rvp/rv64zpsfoperand.s
  llvm/test/MC/RISCV/rvp/simd-alu.s
  llvm/test/MC/RISCV/rvp/simd-cmp.s
  llvm/test/MC/RISCV/rvp/simd-misc.s
  llvm/test/MC/RISCV/rvp/simd-mul.s
  llvm/test/MC/RISCV/rvp/simd-shift.s
  llvm/test/MC/RISCV/rvp/simd-unpacking.s

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