[PATCH] D99667: [RISCV] Add support for bitcasts between scalar and fixed-length vectors

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck marked an inline comment as done.
frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1519
+    }
     assert(((Subtarget.is64Bit() && Subtarget.hasStdExtF()) ||
             Subtarget.hasStdExtZfh()) &&
----------------
craig.topper wrote:
> frasercrmck wrote:
> > I have a feeling this assert is similarly unsafe, but I couldn't get a test case from an illegal scalar type to a legal result type. Is there a way to break it, @craig.topper?
> ```
> define float @foo(i32 %x) {
>   %a = bitcast i32 %x to float
>   ret float %a
> }
> ```
> 
> Compile with -mtriple=riscv32 -target-abi=ilp32f -mattr=experimental-v,+f -riscv-v-vector-bits-min=128
Ah yes of course, thanks. I had forgotten to use `-target-abi` so the bitcast was removed too early.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99667/new/

https://reviews.llvm.org/D99667