[llvm] fa0aff6 - Revert "[X86][SSE] isHorizontalBinOp - use getTargetShuffleInputs helper"
Nico Weber via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 2 06:56:06 PDT 2021
Author: Nico Weber
Date: 2021-04-02T09:55:55-04:00
New Revision: fa0aff6d6960e3ca4640b0a64b675a768ab99bf0
URL: https://github.com/llvm/llvm-project/commit/fa0aff6d6960e3ca4640b0a64b675a768ab99bf0
DIFF: https://github.com/llvm/llvm-project/commit/fa0aff6d6960e3ca4640b0a64b675a768ab99bf0.diff
LOG: Revert "[X86][SSE] isHorizontalBinOp - use getTargetShuffleInputs helper"
This reverts commit 500969f1d0b1d92d7c4ccfb6bf8807de96b7e4a0.
Makes clang assert compiling avx2 code, see
https://bugs.chromium.org/p/chromium/issues/detail?id=1195353#c4
for a standalone repro.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 563f38db86ae..f4f9812a4024 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45984,8 +45984,18 @@ static bool isHorizontalBinOp(unsigned HOpcode, SDValue &LHS, SDValue &RHS,
"Unsupported vector type for horizontal add/sub");
unsigned NumElts = VT.getVectorNumElements();
+ // TODO - can we make a general helper method that does all of this for us?
auto GetShuffle = [&](SDValue Op, SDValue &N0, SDValue &N1,
SmallVectorImpl<int> &ShuffleMask) {
+ if (Op.getOpcode() == ISD::VECTOR_SHUFFLE) {
+ if (!Op.getOperand(0).isUndef())
+ N0 = Op.getOperand(0);
+ if (!Op.getOperand(1).isUndef())
+ N1 = Op.getOperand(1);
+ ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op)->getMask();
+ ShuffleMask.append(Mask.begin(), Mask.end());
+ return;
+ }
bool UseSubVector = false;
if (Op.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
Op.getOperand(0).getValueType().is256BitVector() &&
@@ -45994,25 +46004,23 @@ static bool isHorizontalBinOp(unsigned HOpcode, SDValue &LHS, SDValue &RHS,
UseSubVector = true;
}
SmallVector<SDValue, 2> SrcOps;
- SmallVector<int, 16> SrcMask, ScaledMask;
+ SmallVector<int, 16> SrcShuffleMask;
SDValue BC = peekThroughBitcasts(Op);
- if (getTargetShuffleInputs(BC, SrcOps, SrcMask, DAG) &&
- !isAnyZero(SrcMask) && all_of(SrcOps, [BC](SDValue Op) {
- return Op.getValueSizeInBits() == BC.getValueSizeInBits();
- })) {
- resolveTargetShuffleInputsAndMask(SrcOps, SrcMask);
- if (!UseSubVector && SrcOps.size() <= 2 &&
- scaleShuffleElements(SrcMask, NumElts, ScaledMask)) {
+ if (isTargetShuffle(BC.getOpcode()) &&
+ getTargetShuffleMask(BC.getNode(), BC.getSimpleValueType(), false,
+ SrcOps, SrcShuffleMask)) {
+ if (!UseSubVector && SrcShuffleMask.size() == NumElts &&
+ SrcOps.size() <= 2) {
N0 = SrcOps.size() > 0 ? SrcOps[0] : SDValue();
N1 = SrcOps.size() > 1 ? SrcOps[1] : SDValue();
- ShuffleMask.assign(ScaledMask.begin(), ScaledMask.end());
+ ShuffleMask.append(SrcShuffleMask.begin(), SrcShuffleMask.end());
}
- if (UseSubVector && SrcOps.size() == 1 &&
- scaleShuffleElements(SrcMask, 2 * NumElts, ScaledMask)) {
+ if (UseSubVector && (SrcShuffleMask.size() == (NumElts * 2)) &&
+ SrcOps.size() == 1) {
N0 = extract128BitVector(SrcOps[0], 0, DAG, SDLoc(Op));
N1 = extract128BitVector(SrcOps[0], NumElts, DAG, SDLoc(Op));
- ArrayRef<int> Mask = ArrayRef<int>(ScaledMask).slice(0, NumElts);
- ShuffleMask.assign(Mask.begin(), Mask.end());
+ ArrayRef<int> Mask = ArrayRef<int>(SrcShuffleMask).slice(0, NumElts);
+ ShuffleMask.append(Mask.begin(), Mask.end());
}
}
};
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