[PATCH] D99730: [RISCV] Optimize more redundant VSETVLIs

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 2 02:11:04 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG3b48d849d443: [RISCV] Optimize more redundant VSETVLIs (authored by frasercrmck).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99730/new/

https://reviews.llvm.org/D99730

Files:
  llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/cleanup-vsetvli.mir
  llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll

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