[PATCH] D99717: [RISCV] Add some tests showing vsetvli cleanup opportunities
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 1 03:44:18 PDT 2021
frasercrmck created this revision.
frasercrmck added reviewers: craig.topper, rogfer01, evandro, HsiangKai, khchen, arcbbb.
Herald added subscribers: vkmr, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb.
frasercrmck requested review of this revision.
Herald added subscribers: llvm-commits, MaskRay.
Herald added a project: LLVM.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D99717
Files:
llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
Index: llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
+++ llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
@@ -48,3 +48,19 @@
call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2)
ret void
}
+
+declare <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i64(<vscale x 4 x i32>*, i64)
+
+; Check that we remove the redundant vsetvli when followed by another operation
+; FIXME: We don't
+define <vscale x 4 x i32> @redundant_vsetvli(i64 %avl, <vscale x 4 x i32>* %ptr) nounwind {
+; CHECK-LABEL: redundant_vsetvli:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, a0, e32,m2,ta,mu
+; CHECK-NEXT: vsetvli a0, a0, e32,m2,ta,mu
+; CHECK-NEXT: vle32.v v8, (a1)
+; CHECK-NEXT: ret
+ %vl = call i64 @llvm.riscv.vsetvli.i64(i64 %avl, i64 2, i64 1)
+ %x = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i64(<vscale x 4 x i32>* %ptr, i64 %vl)
+ ret <vscale x 4 x i32> %x
+}
Index: llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
+++ llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
@@ -30,3 +30,19 @@
call i32 @llvm.riscv.vsetvlimax.i32(i32 3, i32 3)
ret void
}
+
+declare <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i32(<vscale x 4 x i32>*, i32)
+
+; Check that we remove the redundant vsetvli when followed by another operation
+; FIXME: We don't
+define <vscale x 4 x i32> @redundant_vsetvli(i32 %avl, <vscale x 4 x i32>* %ptr) nounwind {
+; CHECK-LABEL: redundant_vsetvli:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, a0, e32,m2,ta,mu
+; CHECK-NEXT: vsetvli a0, a0, e32,m2,ta,mu
+; CHECK-NEXT: vle32.v v8, (a1)
+; CHECK-NEXT: ret
+ %vl = call i32 @llvm.riscv.vsetvli.i32(i32 %avl, i32 2, i32 1)
+ %x = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i32(<vscale x 4 x i32>* %ptr, i32 %vl)
+ ret <vscale x 4 x i32> %x
+}
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