[PATCH] D99667: [RISCV] Add support for bitcasts between scalar and fixed-length vectors

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck marked an inline comment as done.
frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1519
+    }
     assert(((Subtarget.is64Bit() && Subtarget.hasStdExtF()) ||
             Subtarget.hasStdExtZfh()) &&
----------------
I have a feeling this assert is similarly unsafe, but I couldn't get a test case from an illegal scalar type to a legal result type. Is there a way to break it, @craig.topper?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D99667/new/

https://reviews.llvm.org/D99667