[PATCH] D99662: [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:5826
+    Opc = AArch64::FMULv8i16_indexed;
+    genIndexedMultiply(MF, MRI, TII, Root, InsInstrs, IdxDupOp, Opc, RC);
+    break;
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Should this be setting `MUL = genIndexedMultiply(..)`? 


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:5834
   // assert(MUL && "MUL was never set");
-  DelInstrs.push_back(MUL);
+  if (MUL)
+    DelInstrs.push_back(MUL);
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Was wondering because of the added if here.
Unrelated but that FIXME looks a bit dodgy. Any idea what that could be while we are at it?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99662/new/

https://reviews.llvm.org/D99662