[llvm] a991ee3 - [AMDGPU] Use a common check prefix for some image tests. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 31 09:35:17 PDT 2021
Author: Jay Foad
Date: 2021-03-31T17:27:20+01:00
New Revision: a991ee330b6f008b7c68816ace9ec44561ce69de
URL: https://github.com/llvm/llvm-project/commit/a991ee330b6f008b7c68816ace9ec44561ce69de
DIFF: https://github.com/llvm/llvm-project/commit/a991ee330b6f008b7c68816ace9ec44561ce69de.diff
LOG: [AMDGPU] Use a common check prefix for some image tests. NFC.
Added:
Modified:
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
index a7849c3c3b37..7cc06ac499dc 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
@@ -1,36 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
-; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s
+; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GFX68 %s
+; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GFX68 %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
define amdgpu_ps float @load_1d_f32_x(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_x:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v0, v0, s[0:7] dmask:0x1 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_x:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v0, v0, s[0:7] dmask:0x1 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_x:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v0, v0, s[0:7] dmask:0x1 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_x:
; GFX10: ; %bb.0:
@@ -50,33 +36,19 @@ define amdgpu_ps float @load_1d_f32_x(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps float @load_1d_f32_y(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_y:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v0, v0, s[0:7] dmask:0x2 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_y:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v0, v0, s[0:7] dmask:0x2 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_y:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v0, v0, s[0:7] dmask:0x2 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_y:
; GFX10: ; %bb.0:
@@ -96,33 +68,19 @@ define amdgpu_ps float @load_1d_f32_y(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps float @load_1d_f32_z(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_z:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v0, v0, s[0:7] dmask:0x4 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_z:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v0, v0, s[0:7] dmask:0x4 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_z:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v0, v0, s[0:7] dmask:0x4 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_z:
; GFX10: ; %bb.0:
@@ -142,33 +100,19 @@ define amdgpu_ps float @load_1d_f32_z(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps float @load_1d_f32_w(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_w:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_w:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_w:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v0, v0, s[0:7] dmask:0x8 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_w:
; GFX10: ; %bb.0:
@@ -188,33 +132,19 @@ define amdgpu_ps float @load_1d_f32_w(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <2 x float> @load_1d_v2f32_xy(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v2f32_xy:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v2f32_xy:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v2f32_xy:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v2f32_xy:
; GFX10: ; %bb.0:
@@ -234,33 +164,19 @@ define amdgpu_ps <2 x float> @load_1d_v2f32_xy(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <2 x float> @load_1d_v2f32_xz(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v2f32_xz:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x5 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v2f32_xz:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x5 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v2f32_xz:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x5 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v2f32_xz:
; GFX10: ; %bb.0:
@@ -280,33 +196,19 @@ define amdgpu_ps <2 x float> @load_1d_v2f32_xz(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <2 x float> @load_1d_v2f32_xw(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v2f32_xw:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v2f32_xw:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v2f32_xw:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x9 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v2f32_xw:
; GFX10: ; %bb.0:
@@ -326,33 +228,19 @@ define amdgpu_ps <2 x float> @load_1d_v2f32_xw(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <2 x float> @load_1d_v2f32_yz(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v2f32_yz:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x6 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v2f32_yz:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x6 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v2f32_yz:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:1], v0, s[0:7] dmask:0x6 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v2f32_yz:
; GFX10: ; %bb.0:
@@ -372,33 +260,19 @@ define amdgpu_ps <2 x float> @load_1d_v2f32_yz(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <3 x float> @load_1d_v3f32_xyz(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v3f32_xyz:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v3f32_xyz:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v3f32_xyz:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v3f32_xyz:
; GFX10: ; %bb.0:
@@ -418,33 +292,19 @@ define amdgpu_ps <3 x float> @load_1d_v3f32_xyz(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps <4 x float> @load_1d_v4f32_xyzw(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v4f32_xyzw:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v4f32_xyzw:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v4f32_xyzw:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: image_load v[0:3], v0, s[0:7] dmask:0xf unorm
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v4f32_xyzw:
; GFX10: ; %bb.0:
@@ -464,39 +324,22 @@ define amdgpu_ps <4 x float> @load_1d_v4f32_xyzw(<8 x i32> inreg %rsrc, i32 %s)
}
define amdgpu_ps float @load_1d_f32_tfe_dmask_x(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_tfe_dmask_x:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: v_mov_b32_e32 v1, 0
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: v_mov_b32_e32 v2, v1
-; GFX6-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: v_mov_b32_e32 v0, v2
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_tfe_dmask_x:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: v_mov_b32_e32 v1, 0
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: v_mov_b32_e32 v2, v1
-; GFX8-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v0, v2
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_tfe_dmask_x:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: v_mov_b32_e32 v1, 0
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: v_mov_b32_e32 v2, v1
+; GFX68-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: v_mov_b32_e32 v0, v2
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_tfe_dmask_x:
; GFX10: ; %bb.0:
@@ -521,41 +364,23 @@ define amdgpu_ps float @load_1d_f32_tfe_dmask_x(<8 x i32> inreg %rsrc, i32 %s) {
}
define amdgpu_ps float @load_1d_v2f32_tfe_dmask_xy(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v2f32_tfe_dmask_xy:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: v_mov_b32_e32 v1, 0
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: v_mov_b32_e32 v2, v1
-; GFX6-NEXT: v_mov_b32_e32 v3, v1
-; GFX6-NEXT: image_load v[1:3], v0, s[0:7] dmask:0x3 unorm tfe
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: v_mov_b32_e32 v0, v3
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v2f32_tfe_dmask_xy:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: v_mov_b32_e32 v1, 0
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: v_mov_b32_e32 v2, v1
-; GFX8-NEXT: v_mov_b32_e32 v3, v1
-; GFX8-NEXT: image_load v[1:3], v0, s[0:7] dmask:0x3 unorm tfe
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v0, v3
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v2f32_tfe_dmask_xy:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: v_mov_b32_e32 v1, 0
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: v_mov_b32_e32 v2, v1
+; GFX68-NEXT: v_mov_b32_e32 v3, v1
+; GFX68-NEXT: image_load v[1:3], v0, s[0:7] dmask:0x3 unorm tfe
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: v_mov_b32_e32 v0, v3
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v2f32_tfe_dmask_xy:
; GFX10: ; %bb.0:
@@ -581,43 +406,24 @@ define amdgpu_ps float @load_1d_v2f32_tfe_dmask_xy(<8 x i32> inreg %rsrc, i32 %s
}
define amdgpu_ps float @load_1d_v3f32_tfe_dmask_xyz(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v3f32_tfe_dmask_xyz:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: v_mov_b32_e32 v1, 0
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: v_mov_b32_e32 v2, v1
-; GFX6-NEXT: v_mov_b32_e32 v3, v1
-; GFX6-NEXT: v_mov_b32_e32 v4, v1
-; GFX6-NEXT: image_load v[1:4], v0, s[0:7] dmask:0x7 unorm tfe
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: v_mov_b32_e32 v0, v4
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v3f32_tfe_dmask_xyz:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: v_mov_b32_e32 v1, 0
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: v_mov_b32_e32 v2, v1
-; GFX8-NEXT: v_mov_b32_e32 v3, v1
-; GFX8-NEXT: v_mov_b32_e32 v4, v1
-; GFX8-NEXT: image_load v[1:4], v0, s[0:7] dmask:0x7 unorm tfe
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v0, v4
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v3f32_tfe_dmask_xyz:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: v_mov_b32_e32 v1, 0
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: v_mov_b32_e32 v2, v1
+; GFX68-NEXT: v_mov_b32_e32 v3, v1
+; GFX68-NEXT: v_mov_b32_e32 v4, v1
+; GFX68-NEXT: image_load v[1:4], v0, s[0:7] dmask:0x7 unorm tfe
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: v_mov_b32_e32 v0, v4
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v3f32_tfe_dmask_xyz:
; GFX10: ; %bb.0:
@@ -644,39 +450,22 @@ define amdgpu_ps float @load_1d_v3f32_tfe_dmask_xyz(<8 x i32> inreg %rsrc, i32 %
}
define amdgpu_ps float @load_1d_v4f32_tfe_dmask_xyzw(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_v4f32_tfe_dmask_xyzw:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: v_mov_b32_e32 v1, 0
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: v_mov_b32_e32 v2, v1
-; GFX6-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x10 unorm tfe
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: v_mov_b32_e32 v0, v2
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_v4f32_tfe_dmask_xyzw:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: v_mov_b32_e32 v1, 0
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: v_mov_b32_e32 v2, v1
-; GFX8-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x10 unorm tfe
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v0, v2
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_v4f32_tfe_dmask_xyzw:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: v_mov_b32_e32 v1, 0
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: v_mov_b32_e32 v2, v1
+; GFX68-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x10 unorm tfe
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: v_mov_b32_e32 v0, v2
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_v4f32_tfe_dmask_xyzw:
; GFX10: ; %bb.0:
@@ -701,39 +490,22 @@ define amdgpu_ps float @load_1d_v4f32_tfe_dmask_xyzw(<8 x i32> inreg %rsrc, i32
}
define amdgpu_ps float @load_1d_f32_tfe_dmask_0(<8 x i32> inreg %rsrc, i32 %s) {
-; GFX6-LABEL: load_1d_f32_tfe_dmask_0:
-; GFX6: ; %bb.0:
-; GFX6-NEXT: v_mov_b32_e32 v1, 0
-; GFX6-NEXT: s_mov_b32 s0, s2
-; GFX6-NEXT: s_mov_b32 s1, s3
-; GFX6-NEXT: s_mov_b32 s2, s4
-; GFX6-NEXT: s_mov_b32 s3, s5
-; GFX6-NEXT: s_mov_b32 s4, s6
-; GFX6-NEXT: s_mov_b32 s5, s7
-; GFX6-NEXT: s_mov_b32 s6, s8
-; GFX6-NEXT: s_mov_b32 s7, s9
-; GFX6-NEXT: v_mov_b32_e32 v2, v1
-; GFX6-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
-; GFX6-NEXT: s_waitcnt vmcnt(0)
-; GFX6-NEXT: v_mov_b32_e32 v0, v2
-; GFX6-NEXT: ; return to shader part epilog
-;
-; GFX8-LABEL: load_1d_f32_tfe_dmask_0:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: v_mov_b32_e32 v1, 0
-; GFX8-NEXT: s_mov_b32 s0, s2
-; GFX8-NEXT: s_mov_b32 s1, s3
-; GFX8-NEXT: s_mov_b32 s2, s4
-; GFX8-NEXT: s_mov_b32 s3, s5
-; GFX8-NEXT: s_mov_b32 s4, s6
-; GFX8-NEXT: s_mov_b32 s5, s7
-; GFX8-NEXT: s_mov_b32 s6, s8
-; GFX8-NEXT: s_mov_b32 s7, s9
-; GFX8-NEXT: v_mov_b32_e32 v2, v1
-; GFX8-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_mov_b32_e32 v0, v2
-; GFX8-NEXT: ; return to shader part epilog
+; GFX68-LABEL: load_1d_f32_tfe_dmask_0:
+; GFX68: ; %bb.0:
+; GFX68-NEXT: v_mov_b32_e32 v1, 0
+; GFX68-NEXT: s_mov_b32 s0, s2
+; GFX68-NEXT: s_mov_b32 s1, s3
+; GFX68-NEXT: s_mov_b32 s2, s4
+; GFX68-NEXT: s_mov_b32 s3, s5
+; GFX68-NEXT: s_mov_b32 s4, s6
+; GFX68-NEXT: s_mov_b32 s5, s7
+; GFX68-NEXT: s_mov_b32 s6, s8
+; GFX68-NEXT: s_mov_b32 s7, s9
+; GFX68-NEXT: v_mov_b32_e32 v2, v1
+; GFX68-NEXT: image_load v[1:2], v0, s[0:7] dmask:0x1 unorm tfe
+; GFX68-NEXT: s_waitcnt vmcnt(0)
+; GFX68-NEXT: v_mov_b32_e32 v0, v2
+; GFX68-NEXT: ; return to shader part epilog
;
; GFX10-LABEL: load_1d_f32_tfe_dmask_0:
; GFX10: ; %bb.0:
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