[llvm] 07a6d07 - [InstCombine] add tests for srem+abs; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-03-31T11:29:20-04:00
New Revision: 07a6d07c482706268caa9c4f9e3a13d71f9c7fb9

URL: https://github.com/llvm/llvm-project/commit/07a6d07c482706268caa9c4f9e3a13d71f9c7fb9
DIFF: https://github.com/llvm/llvm-project/commit/07a6d07c482706268caa9c4f9e3a13d71f9c7fb9.diff

LOG: [InstCombine] add tests for srem+abs; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 9961c7170d0ac..db702486c8dd5 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -388,3 +388,38 @@ define i32 @demand_low_bits(i32 %x) {
   %r = and i32 %a, 3
   ret i32 %r
 }
+
+define i32 @srem_by_2_int_min_is_poison(i32 %x) {
+; CHECK-LABEL: @srem_by_2_int_min_is_poison(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 2
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.abs.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 2
+  %r = call i32 @llvm.abs.i32(i32 %s, i1 true)
+  ret i32 %r
+}
+
+define <3 x i82> @srem_by_2(<3 x i82> %x, <3 x i82>* %p) {
+; CHECK-LABEL: @srem_by_2(
+; CHECK-NEXT:    [[S:%.*]] = srem <3 x i82> [[X:%.*]], <i82 2, i82 2, i82 2>
+; CHECK-NEXT:    store <3 x i82> [[S]], <3 x i82>* [[P:%.*]], align 64
+; CHECK-NEXT:    [[R:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[S]], i1 false)
+; CHECK-NEXT:    ret <3 x i82> [[R]]
+;
+  %s = srem <3 x i82> %x, <i82 2, i82 2, i82 2>
+  store <3 x i82> %s, <3 x i82>* %p
+  %r = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %s, i1 false)
+  ret <3 x i82> %r
+}
+
+define i32 @srem_by_3(i32 %x) {
+; CHECK-LABEL: @srem_by_3(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 3
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.abs.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 3
+  %r = call i32 @llvm.abs.i32(i32 %s, i1 true)
+  ret i32 %r
+}