[llvm] 3a6365a - [ARM] Add FeatureHasNoBranchPredictor for Thumb1 cores
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 30 13:45:37 PDT 2021
Author: David Green
Date: 2021-03-30T21:45:26+01:00
New Revision: 3a6365a439ede4b7c65076bb42b1b7dbf72216b5
URL: https://github.com/llvm/llvm-project/commit/3a6365a439ede4b7c65076bb42b1b7dbf72216b5
DIFF: https://github.com/llvm/llvm-project/commit/3a6365a439ede4b7c65076bb42b1b7dbf72216b5.diff
LOG: [ARM] Add FeatureHasNoBranchPredictor for Thumb1 cores
Mark v6m/v8m-baseline cores as having no branch predictors. This should
not alter very much on its own, but is more correct as the cores do not
have branch predictors and can help in the future.
Added:
Modified:
llvm/lib/Target/ARM/ARM.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 7fe10c741d8e8..9da2bdbbb1033 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1000,10 +1000,14 @@ def : Processor<"arm1136jf-s", ARMV6Itineraries, [ARMv6,
FeatureVFP2,
FeatureHasSlowFPVMLx]>;
-def : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m]>;
-def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m]>;
-def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m]>;
-def : Processor<"sc000", ARMV6Itineraries, [ARMv6m]>;
+def : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m,
+ FeatureHasNoBranchPredictor]>;
+def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m,
+ FeatureHasNoBranchPredictor]>;
+def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m,
+ FeatureHasNoBranchPredictor]>;
+def : Processor<"sc000", ARMV6Itineraries, [ARMv6m,
+ FeatureHasNoBranchPredictor]>;
def : Processor<"arm1176j-s", ARMV6Itineraries, [ARMv6kz]>;
def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>;
@@ -1199,7 +1203,8 @@ def : ProcessorModel<"cortex-m7", CortexM7Model, [ARMv7em,
FeatureUseMISched]>;
def : ProcNoItin<"cortex-m23", [ARMv8mBaseline,
- FeatureNoMovt]>;
+ FeatureNoMovt,
+ FeatureHasNoBranchPredictor]>;
def : ProcessorModel<"cortex-m33", CortexM4Model, [ARMv8mMainline,
FeatureDSP,
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